According to the invention, a processing core (12) comprising a processing pipeline (100) having N-number of processing paths (56), each of which process instructions (54) on M-bit data words. In addition, the processing core (12) includes one or more register files (60), each preferably having Q-number...http://www.google.de/patents/US7080234?utm_source=gb-gplus-sharePatent US7080234 - VLIW computer processing architecture having the problem counter stored in a register file register
