A highly parallel data processing system includes an array of n processing elements (PEs) and a controller sequence processor (SP) wherein at least one PE is combined with the controller SP to create a Dynamic Merged Processor (DP) which supports two modes of operation. In its first mode of operation,...http://www.google.de/patents/US6219776?utm_source=gb-gplus-sharePatent US6219776 - Merged array controller and processing element
