A memory cell array includes a plurality of floating body memory cells, which are arranged in cell rows, and world lines, wherein each word line is configured to control memory cells associated with a pair of cell rows. The memory cell array also includes bitlines, wherein each bitline is electrically...http://www.google.de/patents/US7719869?utm_source=gb-gplus-sharePatent US7719869 - Memory cell array comprising floating body memory cells
