A memory device and method employing a scheme for reduced power consumption is disclosed. By dividing a memory array sector into memory sub arrays, the memory device can provide power to memory sub arrays that need to be powered up or, in the alternative, powered down. This reduces the power consumption...http://www.google.de/patents/US6356500?utm_source=gb-gplus-sharePatent US6356500 - Reduced power DRAM device and method
