A semiconductor structure including a semiconductor substrate, at least one first crystalline epitaxial layer on the substrate, the first layer having a surface which is planarized, and at least one second crystalline epitaxial layer on the at least one first layer. In another embodiment of the invention...http://www.google.de/patents/US7081410?utm_source=gb-gplus-sharePatent US7081410 - Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization
