A statically operated dynamic CMOS logic gate that includes an FET logic network for performing a predefined logic function with respect to its logic inputs, an output node, a precharge transistor, and in some embodiments an evaluate transistor. During operation, the precharge transistor is first turned...http://www.google.de/patents/US5440243?utm_source=gb-gplus-sharePatent US5440243 - Apparatus and method for allowing a dynamic logic gate to operation statically using subthreshold conduction precharging
