A circuit arrangement for level conversion of TTL-logic levels to ECL-logic levels with at least one emitter-coupled current switch having an input addressable by TTL-logic levels and an output from which ECL-logic levels can be taken off, including a first current switch formed of two emitter-coupled...http://www.google.de/patents/US4607177?utm_source=gb-gplus-sharePatent US4607177 - Circuit arrangement for conversion TTL logic signals to ECL logic signals
