A method for detecting and handling memory-mapped I/O in a pipelined data processing system is provided. The method uses two signals on the system interface: when the system generates a read bus cycle, it activates an output signal if certain I/O requirements are not satisfied; an input signal is activated...http://www.google.de/patents/US4802085?utm_source=gb-gplus-sharePatent US4802085 - Apparatus and method for detecting and handling memory-mapped I/O by a pipelined microprocessor
