An embedded memory on an integrated circuit has a memory cell array equipped with replacement cells and mapping logic for electronically substituting the replacement cells for defective cells at at least one location in the memory cell array. The memory also has programmable links for storing redundancy...http://www.google.de/patents/US7162669?utm_source=gb-gplus-sharePatent US7162669 - Apparatus and method for compressing redundancy information for embedded memories, including cache memories, of integrated circuits
