A combination EEPROM and Flash memory is described containing cells in which the stacked gate transistor of the Flash cell is used in conjunction with a select transistor to form an EEPROM cell. The select transistor is made sufficiently small so as to allow the EEPROM cells to accommodate the bit line...http://www.google.de/patents/US7349257?utm_source=gb-gplus-sharePatent US7349257 - Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations
