An EPROM device is provided with self-aligned bit-lines. A tunnel oxide layer is formed on a semiconductor substrate. Blanket layers of doped, polysilicon layer, an interelectrode dielectric layer and a blanket polycide layer are formed over the dielectric layer. A TEOS dielectric layer is formed over...http://www.google.de/patents/US5589413?utm_source=gb-gplus-sharePatent US5589413 - Method of manufacturing self-aligned bit-line during EPROM fabrication
