A controlled impedance bus includes a pair of bus traces that carry a transmission minimized differential signal (TMDS). Two or more buffer output terminals. Each output terminal includes a pair of pads connected to the pair of bus traces such that unused pads create minimal stubs on the pair of bus...http://www.google.de/patents/US7517223?utm_source=gb-gplus-sharePatent US7517223 - Controlled impedance bus with a buffer device