A test carrier and an interconnect for testing semiconductor components, such as bare dice and chip scale packages, are provided. The carrier includes a base on which the interconnect is mounted, and a force applying mechanism for biasing the component against the interconnect. The interconnect includes...http://www.google.de/patents/US6687989?utm_source=gb-gplus-sharePatent US6687989 - Method for fabricating interconnect having support members for preventing component flexure
