Structures and methods for DEAPROM memory with low tunnel barrier intergate insulators are provided. The DEAPROM memory includes a first source/drain region and a second source/drain region separated by a channel region in a substrate. A floating gate opposes the channel region and is separated therefrom...http://www.google.de/patents/US6778441?utm_source=gb-gplus-sharePatent US6778441 - Integrated circuit memory device and method
