Disclosed are selected embodiments of a processor that may include a plurality of thread units and a register file architecture to support speculative multithreading. For at least one embodiment, live-in values for a speculative thread are computed via execution of a precomputation slice and are stored...http://www.google.de/patents/US8166282?utm_source=gb-gplus-sharePatent US8166282 - Multi-version register file for multithreading processors with live-in precomputation
