There is disclosed a method of fabricating TFTs having reduced interconnect resistance by having improved contacts to source/drain regions. A silicide layer is formed in intimate contact with the source/drain regions. The remaining metallization layer is selectively etched to form a contact pad or conductive...http://www.google.de/patents/US6882018?utm_source=gb-gplus-sharePatent US6882018 - Semiconductor device that include silicide layers
