An array of floating gate memory cells, and a method of making same, where each pair of memory cells includes a pair of trenches formed into a surface of a semiconductor substrate, with a strip of the substrate disposed therebetween, a source region formed in the substrate strip, a pair of drain regions,...http://www.google.de/patents/US6906379?utm_source=gb-gplus-sharePatent US6906379 - Semiconductor memory array of floating gate memory cells with buried floating gate
