A method is described for fabricating a novel double trench memory structure including a shallow trench access transistor adjacent to a deep trench storage capacitor. The described three-dimensional DRAM cell structure consists of shallow trench access transistors and deep trench storage capacitors in...http://www.google.de/patents/US5064777?utm_source=gb-gplus-sharePatent US5064777 - Fabrication method for a double trench memory cell device