A vertically integrated CMOS logic gate has spaced semiconductor layers with control gates located between the layers and insulated from them by gate oxide. Transistors formed in one semiconductor layer are vertically aligned with transistors formed in the other semiconductor layer. Pairs of vertically...http://www.google.de/patents/US4680609?utm_source=gb-gplus-sharePatent US4680609 - Structure and fabrication of vertically integrated CMOS logic gates
