A composite, layered, integrated circuit formed by bonding of insulator layers on wafers provides for combination of otherwise incompatible technologies such as trench capacitor DRAM arrays and high performance, low power, low voltage silicon on insulator (SOI) switching transistors and short signal...http://www.google.de/patents/US6590258?utm_source=gb-gplus-sharePatent US6590258 - SIO stacked DRAM logic
