A fill pattern for a semiconductor device such as a memory cell. The memory cell includes a plurality of first topographic structures comprising conductive lead lines deposited on a semiconductor substrate, and a plurality of second topographic structures comprising fill patterns such that the top surfaces...http://www.google.de/patents/US6777813?utm_source=gb-gplus-sharePatent US6777813 - Fill pattern generation for spin-on-glass and related self-planarization deposition
