A semiconductor structure to prevent gate wrap-around and corner parasitic leakage comprising a semiconductor substrate having a planar surface. A trench is located in the substrate, the trench having a sidewall. An intersection of the trench and the surface forms a corner. A dielectric lines the sidewall...http://www.google.de/patents/US5521422?utm_source=gb-gplus-sharePatent US5521422 - Corner protected shallow trench isolation device
