A method and system for high speed testing of memories in a multi-device system, where individual devices of the multi-device system are arranged in a serial interconnected configuration. High speed testing is achieved by first writing test pattern data to the memory banks of each device of the multi-device...http://www.google.de/patents/US7679976?utm_source=gb-gplus-sharePatent US7679976 - Circuit and method for testing multi-device systems
