An apparatus and method are presented for increasing the throughput within a single-channel of a pipeline microprocessor. Back-to-back pairs of micro instructions are evaluated to determine if they can be combined for execution in parallel. If so, then they are combined and issued for concurrent execution....http://www.google.de/patents/US6330657?utm_source=gb-gplus-sharePatent US6330657 - Pairing of micro instructions in the instruction queue
