A plurality of parallel gate bus lines 16n, 16n+1, 16n+2, . . . and a plurality of parallel drain bus lines 18m, 18m+1, . . . are provided. Thin film transistors 14 are disposed near the lower end of sub-patterns 30n, 30n+1, 30n+2, . . . The source electrodes 36 of the thin film transistors 14 are picture...http://www.google.de/patents/US5946058?utm_source=gb-gplus-sharePatent US5946058 - Transistor matrix device including features for minimizing the effect of parasitic capacitances
