A stress buffer and dopant barrier in the form of a TetraEthylOrthoSilicate (TEOS) film is deposited after the capacitor cell plate has been etched and cleaned to thereby eliminate electrical shorts from the bit line to the cell plate....http://www.google.de/patents/US6524907?utm_source=gb-gplus-sharePatent US6524907 - Method of reducing electrical shorts from the bit line to the cell plate
