An apparatus and method for generating early status flags in a pipeline microprocessor is disclosed. The apparatus includes early status flag generation logic that receives an instruction, an early result of the instruction, and a valid indicator of the early result and responsively generates the early...http://www.google.de/patents/US7100024?utm_source=gb-gplus-sharePatent US7100024 - Pipelined microprocessor, apparatus, and method for generating early status flags
