A method for assembling an electronic system with a plurality of layers. Recesses in formed in one or more dielectric layers and electronic components are positioned within the recesses. One or more layers containing the components are placed on a host substrate containing host circuits. Electrical interconnects...http://www.google.de/patents/US7253091?utm_source=gb-gplus-sharePatent US7253091 - Process for assembling three-dimensional systems on a chip and structure thus obtained
