In a cached computer environment, an additional mechanism for communicating to a processor the occurrence of an external hardware event is provided through semaphores in the main memory. In one embodiment, the processor is provided a set of semaphore registers for storing semaphore addresses ...http://www.google.de/patents/US5799195?utm_source=gb-gplus-sharePatent US5799195 - Structure and method for detecting occurrence of external events using semaphores 
