The present invention describes an integer execution unit register file having one fewer write port by employing delayed writeback for data transfer instructions in a high speed processor. The integer execution unit comprises a register file with 32 separate registers, each 32-bits long. The register...http://www.google.de/patents/US5222240?utm_source=gb-gplus-sharePatent US5222240 - Method and apparatus for delaying writing back the results of instructions to a processor
