A central processing unit (CPU) of a computer has a data caching unit which includes a novel dual-ported prefetch cache configured in parallel with a conventional single-ported data cache. In response to a data cache miss, the requested data is fetched from external memory and loaded into the data cache...http://www.google.de/patents/US6098154?utm_source=gb-gplus-sharePatent US6098154 - Apparatus and method for generating a stride used to derive a prefetch address
