A double-sized chip assembly and method is provided for two back-to-back integrated-circuit chips which both have the same fabrication mask sets. An electrically-selectable bonding-pad connection option alternatively provides a standard, non-reversed, option NRO for a bonding-pad layout and a non-standard,...http://www.google.de/patents/US6355980?utm_source=gb-gplus-sharePatent US6355980 - Dual die memory
