A method is provided for isotropically etching pairs of sidewall spacers to reduce the lateral thickness of each sidewall spacer. In an embodiment, first and second pairs of sidewall spacers are concurrently formed upon the opposed sidewall surfaces of respective first and second gate conductors. The...http://www.google.de/patents/US6316302?utm_source=gb-gplus-sharePatent US6316302 - Isotropically etching sidewall spacers to be used for both an NMOS source/drain implant and a PMOS LDD implant
