(12) United States Patent ao) Patent No.: us 6,593,778 Bi
Bharathi (45) Date of Patent: Jul. 15,2003
(54) ZERO DETECT CIRCUIT AND METHOD FOR HIGH FREQUENCY INTEGRATED CIRCUITS
(75) Inventor: Sandeep G. Bharathi, Portland, OR (US)
(73) Assignee: Intel Corporation, Santa Clara, CA (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 09/655,275
(22) Filed: Sep. 5, 2000
(51) Int. CI.7 H03K 19/082; H03K 19/20
(52) U.S. CI 326/121; 326/98
(58) Field of Search 326/95-97, 104,
326/105, 112, 113, 119-122
(56) References Cited
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* cited by examiner
Primary Examiner—Tuan T. Lam
(74) Attorney, Agent, or Firm—Cynthia T. Faatz
