[54] APPARATUS GUARANTEEING THAT A CONTROLLER IN A DISK DRIVE SYSTEM RECEIVES AT LEAST SOME DATA FROM AN INVALID TRACK SECTOR
[75] Inventors: Edward Gershenson, Worcester;
Louis A. Lemone, Stow; Mark C.
Lippitt, Ashland, all of Mass.
[73] Assignee: Data General Corporation, Westboro, Mass.
[21] Appl. No.: 858,540
[22] Filed: Apr. 29,1986
Related U.S. Application Data
[63] Continuation of Ser. No. 495,214, May 16, 1983, abandoned.
[51] Int. CI.* G06F 11/10; G06F 13/12;
G06F 3/06
[52] U.S, a 364/900; 360/51;
369/59; 371/10
[58] Field of Search 360/51, 37.1, 38.1;
369/59; 371/10; 364/200 MS File, 900 MS File
[56] References Cited
U.S. PATENT DOCUMENTS
4,040,022 8/1977 Takii 364/900
4,064,489 12/1977 Babb 364/200
4,086,659 4/1978 Cizmic et al 364/900
4,101,969 7/1978 Lawson et al 364/900
4,275,466 6/1981 Yamamoto 360/51
4,297,737 10/1981 Andreson et al 360/78
4,325,117 4/1982 Parmet et al 364/200
4,409,627 10/1983 Eto et al 360/37.1
4,525,840 6/1985 Heinz et al 360/51
4,618,898 10/1986 Young et al 360/51
4,625,321 11/1986 Pechar 360/51
4,626,933 12/1986 Bucska et al 360/51
4,663,752 5/1987 Kakuse et al 369/48
OTHER PUBLICATIONS
"Missing Address Mark Detector for Disk Files", IBM
Technical Disclosure Bulletin, vol. 14, No. 8, Jan. 1972,
King, R. W. et al., p. 2263.
Primary Examiner—Archie E. Williams, Jr.
Assistant Examiner—Eric Coleman
[57] ABSTRACT
An apparatus provides a sequence detected signal indicating that a synchronization sequence occurring at regular intervals in a stream of data has occurred or should have occurred. The apparatus includes logic for detecting the synchronization sequence, logic responsive to the detection logic for producing the sequence detected signal when the detection logic detects the sequence, and logic for producing the sequence detected signal at a fixed time after the synchronization sequence should have occurred. If the synchronization sequence did occur, the apparatus thus produces two sequence detected signals; however, the device receiving the sequence detected signal responds to the first sequence detected signal and ignores the second. If the synchronization sequence did not occur, the device receiving the sequence detected signal responds to the sequence detected signal produced by the logic responsive to the timing apparatus. The apparatus thus guarantees that the device receiving the sequence detected signal will always receive such a signal.
6 Claims, 24 Drawing Sheets
