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US006523054B1
(12) United States Patent ao) Patent No.: us 6,523,054 Bi
Kamijo (45) Date of Patent: Feb. 18,2003
(54) GALOIS FIELD ARITHMETIC PROCESSOR
(75) Inventor: Shunsuke Kamijo, Kawasaki (JP)
(73) Assignee: Fujitsu Limited, Kawasaki (JP)
( * ) Notice: Subject to any disclaimer, the term ol this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 09/437,473
(22) Filed: Nov. 10, 1999
(30) Foreign Application Priority Data
Dec. 4, 1998 (JP) 10-345463
(51) Int. C I. G06F 7/72
(52) U.S. C I 708/492
(58) Field of Search 708/492; 714/781,
714/784
(56) References Cited
U.S. PATENT DOCUMENTS
5,983,389 A * 11/1999 Shimizu 714/781
6,134,572 A * 10/2000 Well et al 708/492
6,141,786 A * 10/2000 Cox et al 708/492
6.199.086 Bl * 3/2001 Dworkin et al 380/28
6.199.087 Bl * 3/2001 Blake et al 708/492
6,341,297 Bl * 1/2002 Tezuka 708/491
FOREIGN PATENT DOCUMENTS
JP 55-4623 1/1980
JP 60-230719 11/1985
JP 62-268215 11/1987
JP 63-276923 11/1988
OTHER PUBLICATIONS
Hansen, Craig, MicroUnity Systems Engineering, Inc. "Architecture ol a Broadband Mediaprocessor", COMPCON 96, Feb. 25, 1996, pp. 1-7.
A practical Galois field arithmetic processor capable ol high-speed operation with a simple configuration is disclosed. The processor comprises an instruction decoder, an arithmetic unit including a Galois field vector adder, a Galois field vector multiplier and a Galois exponent addersubtractor for executing the Galois field arithmetic operation on first and second operands. In the case where the arithmetic unit includes at least a Galois field vector adder and a Galois field vector multiplier, an exponent-vector conversion circuit is provided for converting the second operand from an exponential expression into a vectorial expression, and an instruction is provided for performing the Galois field operation on the vectorially expressed first operand and the exponentially expressed second operand. With this configuration, in the case where the vectorially expressed data is input as the first operand and the exponentially expressed data is input as the second operand, the second operand is converted into a vectorial expression by the conversion circuit, after which the arithmetic operation is performed in the Galois field vector adder or the Galois vector multiplier.
38 Claims, 11 Drawing Sheets
