United States Patent im
Kimoto et al.
[li] Patent Number: 4,870,562 [45] Date of Patent: Sep. 26, 1989
[54] MICROCOMPUTER CAPABLE OF
ACCESSING INTERNAL MEMORY AT A
DESIRED VARIABLE ACCESS TIME
[75] Inventors: Manabu Kimoto; Yukihiro
Nisbiguchi, both of Tokyo, Japan
[73] Assignee: NEC Corporation, Tokyo, Japan
[21] Appl. No.: 28,513
[22] Filed: Mar. 20, 1987
[30] Foreign Application Priority Data
Mar. 20, 1986 [JP] Japan 61-64348
[51] Int. CI.* G06F 13/16; G06F 13/18
[52] U.S. CI 364/200; 364/243.2;
364/270.2; 364/271.6 [58] Field of Search 364/200, 900, 569
[56] References Cited
U.S. PATENT DOCUMENTS
3,962,683 6/1976 Brown et al 364/200
4,093,982 6/1978 Heuer et al 364/200
4,168,526 9/1979 Auer, Jr. et al 364/569
4,397,031 8/1983 Weber 364/569 X
4,447,870 5/1984 Tague et al 364/200
4,602,347 7/1986 Koyama 364/569
4,665,483 5/1987 Ciacci et al 364/200
Primary Examiner—Felix D. Gruber
Attorney, Agent, or Firm—Sughrue, Mion, Zinn,
Macpeak & Seas
[57] ABSTRACT
A microcomputer includes an instruction execution unit and an internal memory formed on the same chip. A first circuit is provided for setting a memory access cycle for a read/write to the internal memory shorter than that for read/write to an external memory. Further, a second circuit is provided for setting the memory access cycle for the read/write to the internal memory substantially equal to that for the read/write to the external memory. The first and second setting circuits are alternatively and selectively activated.
11 Claims, 7 Drawing Sheets
