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Primary Examiner—Parshotam S. Lall
Assistant Examiner—V. N. Trans
Attorney, Agent, or Firm—Seed and Berry
[57] ABSTRACT
A method and apparatus for determining integrated circuit layouts from a virtual circuit description and specification of a technology. Starting with high-level descriptions of a circuit, a virtual geometric description of the circuit is developed using a virtual grid described in terms of reference points relative to a substrate surface. The relationships among the reference points are expressed as fractions of variables that can also be used to define the design rules. When the technology is specified, the relationships among the reference points is determined, as in the layout of the integrated circuit.
16 Claims, 9 Drawing Sheets
