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(12) United States Patent ao) Patent No.: us 6,493,258 Bi
Lu et al. (45) Date of Patent: Dec. 10,2002
(54) MAGNETO-RESISTIVE MEMORY ARRAY
(75) Inventors: Yong Lu, Plymouth; Theodore Zhu;
Romney R. Katti, both ol Maple
Grove, all of MN (US)
(73) Assignee: Micron Technology, Inc., Boise, ID
(US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 09/618,237
(22) Filed: Jul. 18, 2000
(51) Int. CI.7 G11C 11/00
(52) U.S. CI 365/158; 365/157; 365/171;
365/173
(58) Field of Search 365/158, 173,
365/171, 157, 50, 52, 55, 66, 230.08, 232
(56) References Cited
U.S. PATENT DOCUMENTS
5,650,887 A 7/1997 Dovek et al.
5,650,958 A 7/1997 Gallagher et al.
5,654,566 A 8/1997 Johnson
5,695,864 A 12/1997 Slonczewski
5.701.222 A 12/1997 Gill et al.
5.701.223 A 12/1997 Fontana, Jr. et al.
5,748,519 A 5/1998 Tehrani et al.
5,776,537 A 7/1998 Ryan et al.
5,801,529 A 9/1998 Umemoto et al.
5,838,608 A * 11/1998 Zhu et al 365/158
5,861,328 A 1/1999 Tehrani et al.
5,946,227 A * 8/1999 Naji 365/158
FOREIGN PATENT DOCUMENTS
EP 0 776 011 A2 5/1997
JP 409237410 A * 9/1997 G11B/5/39
WO WO 98/20496 5/1998
OTHER PUBLICATIONS
B Razavi and B.A. Wooley, "Design Techniques for High Speed, High Resolution Comparators", IEEE Journal of Solid State Circuits, vol. 27, pp. 1916-1926, Dec. 1992.
* cited by examiner
Primary Examiner—David Nelms
Assistant Examiner—David Lam
(74) Attorney, Agent, or Firm—Knobbe, Martens, Olson & Bear, LLP
(57) ABSTRACT
A low power, high speed magneto-resistive memory is disclosed. The disclosed memory directly senses the resistive state of one or more magneto-resistive memory elements. This allows the memory to be read during a single read cycle, without the need for a word line current. This may substantially increase the speed and reduce the power of the memory.
26 Claims, 13 Drawing Sheets