US005117276A
United States Patent ti9] [in Patent Number: 5,117,276
Thomas et al. [45] Date of Patent: May 26, 1992
GaAs IC Symposium, publication No. Chi 876-83/0000-0178, 1983 IEEE.
Article entitled "Effects of Capacitance at Crossover Wirings in Power GaAs M.E.S.F.E.T.S", by Aono et al, pp. 417-418, Electronics Letters, May 22, 1980, vol. 16, No. 11.
Article entitled "Glass Reinforced GaAs Beam Lead Schottky Diode with Airbridge for Millimetre Wavelengths", by Mills et al. pp. 787-788, Electronics Letters, Sep. 13, 1984, vol. 20, No. 19. Article entitled "Air-bridge microbolometer for far-infrared detection", by Neikirk et al, pp. 153-155, American Institute of Physics, Appl. Phys. Lett 44(2), Jan. 15, 1984.
Article entitled "Effects of Interconnections on Submicron Chip Performance", by Carter et al, pp. 63-68, VLSI Design, Jan. 1984.
Article entitled "Analysis of Crosstalk in Very High-Speed LSI/VLSI's Using a Coupled Multiconductor MIS Microstrip Line Model", by Seki et al, pp. 1948-1953, IEEE Transactions on Electron Devices, vol. ED-31, No. 12, Dec. 1984. Article entitled "Analysis of Interconnection Delay on Very High-Speed LSI/VLSI Chips Using an MIS Microstrip Line Model", by Hasegawa et al, pp. 1954-1960, IEEE Transactions on Electron Devices, vol. ED-31, No. 12, Dec. 1984. Article entitled "Plasma Planarization", Solid State Transactions, vol. 24. No. 4, Apr. 1981, A. C. Adams. Primary Examiner—William A. Powell
Attorney, Agent, or Firm—Irving S. Rappaport; William
H. Murray; Frank M. Lineuiti [57] ABSTRACT
A semiconductor integrated circuit device includes a high performance interconnect structure which comprises a plurality of interconnects, with each interconnect being structurally separated from the remaining interconnects except at electrical contact points. In one embodiment, each interconnect is substantially surrounded by a layer of dielectric material, there being gaps between each adjacent layer of surrounding dielectric material. Another embodiment, a layer of electrically conductive material is formed over the surrounding dielectric layer preferably filling in the gaps between adjacent layers of surrounding dielectric material. The layer of electrically conductive material acts as a ground plane and heat sink.
20 Claims, 8 Drawing Sheets
