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US006618293B2
(12) United States Patent ao) Patent No.: us 6,618,293 B2
Keays (45) Date of Patent: Sep. 9,2003
(54) NON-VOLATILE MEMORY WITH BLOCK ERASE
(75) Inventor: Brady L. Keays, Half Moon Bay, CA (US)
(73) Assignee: Micron Technology, Inc., Boise, ID (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 10/298,745
(22) Filed: Nov. 18, 2002
(65) Prior Publication Data
US 2003/0072180 Al Apr. 17, 2003
Related U.S. Application Data
(62) Division of application No. 09/939,394, filed on Aug. 24, 2001.
(51) Int. CI.7 G11C 16/04; G11C 8/00;
G11C 7/00
(52) U.S. CI 365/185.29; 365/185.33;
365/185.23; 365/230.06; 365/230.08; 365/236
(58) Field of Search 365/185.33, 185.29,
365/185.23, 230.06, 230.08, 236, 218
(56) References Cited
U.S. PATENT DOCUMENTS
5,175,732 A * 12/1992 Hendel et al 370/463
5,241,507 A 8/1993 Fong
5,343,434 A * 8/1994 Noguchi 365/185.04
5,369,647 A * 11/1994 Kreifels et al 714/736
5,369,754 A * 11/1994 Fandrich et al 711/103
5,412,793 A * 5/1995 Kreifels et al 711/101
5,448,712 A * 9/1995 Kynett et al 711/103
5,491,809 A * 2/1996 Coffman et al 711/103
5,519,333 A * 5/1996 Righter 324/765
* cited by examiner
Primary Examiner—Hoai Ho
Assistant Examiner—Ly Duy Pham
(74) Attorney, Agent, or Firm—Leffert Jay & Polglaze, PA. (57) ABSTRACT
A method and apparatus for erase operations of a flash memory block. In one embodiment, a method comprises erasing a predetermined percent of rows in a memory block, analyzing a number of erase pulses used to erase the predetermined percent and calculating an acceptable number of additional erase pulses which could be applied to the memory block to erase the remaining rows. In another embodiment, a flash memory device comprises a memory array, a controller and a register. The memory array has a plurality of blocks of flash memory cells. The memory cells in each block are arranged in rows. The controller is used to control memory operations to the memory array and the register is coupled to the controller to track the erase status of each row of memory cells.
6 Claims, 7 Drawing Sheets
