Linear Gate Level Cross-Coupled Transistor Device with Cross-Coupled ...

<19) United States

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LINEAR GATE LEVEL CROSS-COUPLED TRANSISTOR DEVICE WITH CROSS-COUPLED TRANSISTORS DEFINED ON TWO GATE ELECTRODE TRACKS WITH CROSSING GATE ELECTRODE

CONNECTIONS
Inventor: Scott T. Becker, Scotts Valley, CA
(I13)

61/045,953, filed on Apr. 17, 2008, provisional application No. 61/050,136, filed on May 2, 2008.

Publication Classification (51) Int. Cl. H01L 29/78 (2006.01) (52) U.S. Cl. ............................... .. 257/369; 257/E29.255 (57) ABSTRACT

A semiconductor device includes conductive features within a gate electrode level region that are each fabricated from a respective originating rectangular-shaped layout feature having a centerline aligned parallel to a first direction. The conductive features form gate electrodes of first and second PMOS transistor devices, and first and second NMOS transistor devices. The gate electrodes of the first PMOS and first NMOS transistor devices extend along a first gate electrode track. The gate electrodes of the second PMOS and second NMOS transistor devices extend along a second gate electrode track. A first set of intercomiected conductors electrically connect the gate electrodes of the first PMOS and second NMOS transistor devices. A second set of interconnected conductors electrically connect the gate electrodes of the second PMOS and first NMOS transistor devices. The first and second sets of intercomiected conductors traverse across each other within different levels of the semiconductor device.