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US006230114B1
(12) United States Patent ao) Patent No.: us 6,230,114 Bi
Hellestrand et al. (45) Date of Patent: May 8,2001
(54) HARDWARE AND SOFTWARE
CO-SIMULATION INCLUDING EXECUTING AN ANALYZED USER PROGRAM
(75) Inventors: Graham R. Hellestrand, Foster City, CA (US); Ricky L. K. Chan, East Lindfield (AU); Ming Chi Kam, Kingsford (AU); James R. Torossian,
Whale Beach (AU)
(73) Assignee: Vast Systems Technology
Corporation, Sunnyvale, CA (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 09/430,855
(22) Filed: Oct. 29, 1999
(51) Int. CI.7 G06F 17/50; G06F 9/455
(52) U.S. CI 703/13; 703/16; 703/17;
703/23; 714/28
(58) Field of Search 703/6, 15, 16,
703/17, 14, 21, 23, 26, 28; 710/7; 712/223, 226, 227; 717/2, 4, 5, 35, 38; 714/28, 33
(56) References Cited
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(List continued on next page.)
Primary Examiner—Kevin J. Teska
Assistant Examiner—Lonnie A. Knox
(74) Attorney, Agent, or Firm—Dov Rosenfeld; Inventek
(57) ABSTRACT
A co-simulation design system that runs on a host computer system is described that includes a hardware simulator and a processor simulator coupled via a interface mechanism. The execution of a user program is simulated by executing an analyzed version of the user program on the host computer system. The analysis adds timing information to the user program so that the processor simulator provides accurate timing information whenever the processor simulator interacts with the hardware simulator.
71 Claims, 12 Drawing Sheets
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* cited by examiner
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