CA2266721C - Measuring device for electrical power and method for measuring the electrical power - Google Patents
Measuring device for electrical power and method for measuring the electrical power Download PDFInfo
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- CA2266721C CA2266721C CA002266721A CA2266721A CA2266721C CA 2266721 C CA2266721 C CA 2266721C CA 002266721 A CA002266721 A CA 002266721A CA 2266721 A CA2266721 A CA 2266721A CA 2266721 C CA2266721 C CA 2266721C
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R21/00—Arrangements for measuring electric power or power factor
- G01R21/133—Arrangements for measuring electric power or power factor by using digital technique
Abstract
(57) In order to obtain a simple circuit design for a high-precision measuring device (1a, 1b) current and voltage signals (I and U) of a consumer (2) are fed to a multiplexer (3) and multiplied with each other after digitization. To compensate external phase angle errors, various waiting cycles (ti, tu) are produced between the current value and t he voltage value (I and U) in the digital signal. The invention provides a measuring device (la, 1b) and a process therefor. The invention i s preferably to be used in electricity meters.
Description
,..*~ . ~
GR 9 6 P 3 7 8 9 P ~ Canada Canada ~PI~ yp;
AMENDED SHEET
MAR ~s r~
o~ssier rue Description ;arms ~
,.,,~.:urgeQ !o Measuring device for electrical power and method for measuring the electrical power The invention relates to a measuring device for electrical power according to the preamble of claim 1 (DE 26 30 959 C2) and a method for measuring the electrical power.
In order to determine or measure electrical power of an electrical load, it is known to feed the current and voltage signals acquired at the load in each case to an analog -to -digital converter (AD converter) and to multiply them by one another in a downstream digital processing device.
Contemporaneous values of= current and voltage are combined with one another ir.. the process .
In order to compen~,ate for angle errors originating, by way of example, from a shunt or a. current transformer, a digital filter may be connected downstream of the AD converter. As an alternative, external compensation using RC circuitry (analog filter) is also po:>sible.. A measuring device of this type requires a high outlay on components, so it is appropriate essentially only far high -quality meters having a high level of accuracy.
DE 26 30 359 C2 (corresponding to FR -A -2 357 907) discloses a measuring device in wh:ic:h an analog time delay element is used to compensate for a tame delay between two signals, which time delay element is connected upstream of a multiplexer.
EP 0 681 235 A1 and EP 0 634 662 Al each disclose an electricity meter in which an A/D converter - as in the case of EP 0 377 282 A1 - is used in each case for current and voltage. The A/D converter is in each case designed as a sigma -delta converter.
DE 195 21 609 A1 and DE 195 21 610 A1 disclose, in connection with electrical energy measurement, using a decimation filter which has a selectable decimation ratio. A reference to the problems in the present ease is not provided therein.
The invention is based on the object of specifying a simple measuring device and a mE:thod in which, despite a low outlay on components, the highest possible measuring accuracy is afforded during measuremE:nt of the electrical power with regard to an angle error. The outlay on components for the measuring device is intended to be kept low.
The object in respect of the measuring device is achieved according to the ir..vention. by means of a measuring device in accordance with them features of claim 1.
The invention is based on the fundamental concept that, taking the prior art as a departure point, it is possible to eliminate a process>ing path with an AD converter, a multiplexer being c:onneci=ed upstream of the remaining processing path as a rep=Lacement. However, this has the disadvantage that t:he respective samples of current and voltage which are ~~rovidE~d in the sense of value pairs for a power value to be determined no longer appear simultaneously but rather succeed one another in time.
GR 9 6 P 3 7 8 9 P ~ Canada Canada ~PI~ yp;
AMENDED SHEET
MAR ~s r~
o~ssier rue Description ;arms ~
,.,,~.:urgeQ !o Measuring device for electrical power and method for measuring the electrical power The invention relates to a measuring device for electrical power according to the preamble of claim 1 (DE 26 30 959 C2) and a method for measuring the electrical power.
In order to determine or measure electrical power of an electrical load, it is known to feed the current and voltage signals acquired at the load in each case to an analog -to -digital converter (AD converter) and to multiply them by one another in a downstream digital processing device.
Contemporaneous values of= current and voltage are combined with one another ir.. the process .
In order to compen~,ate for angle errors originating, by way of example, from a shunt or a. current transformer, a digital filter may be connected downstream of the AD converter. As an alternative, external compensation using RC circuitry (analog filter) is also po:>sible.. A measuring device of this type requires a high outlay on components, so it is appropriate essentially only far high -quality meters having a high level of accuracy.
DE 26 30 359 C2 (corresponding to FR -A -2 357 907) discloses a measuring device in wh:ic:h an analog time delay element is used to compensate for a tame delay between two signals, which time delay element is connected upstream of a multiplexer.
EP 0 681 235 A1 and EP 0 634 662 Al each disclose an electricity meter in which an A/D converter - as in the case of EP 0 377 282 A1 - is used in each case for current and voltage. The A/D converter is in each case designed as a sigma -delta converter.
DE 195 21 609 A1 and DE 195 21 610 A1 disclose, in connection with electrical energy measurement, using a decimation filter which has a selectable decimation ratio. A reference to the problems in the present ease is not provided therein.
The invention is based on the object of specifying a simple measuring device and a mE:thod in which, despite a low outlay on components, the highest possible measuring accuracy is afforded during measuremE:nt of the electrical power with regard to an angle error. The outlay on components for the measuring device is intended to be kept low.
The object in respect of the measuring device is achieved according to the ir..vention. by means of a measuring device in accordance with them features of claim 1.
The invention is based on the fundamental concept that, taking the prior art as a departure point, it is possible to eliminate a process>ing path with an AD converter, a multiplexer being c:onneci=ed upstream of the remaining processing path as a rep=Lacement. However, this has the disadvantage that t:he respective samples of current and voltage which are ~~rovidE~d in the sense of value pairs for a power value to be determined no longer appear simultaneously but rather succeed one another in time.
The present invention uses the disadvantage of the temporal offset in order to compensate for angle errors, error compensation being achieved in an astonishingly simple manner.
Compensation of external a:~gle errors is afforded in this case without additional measures or further components being required. In addition, the angle error compensation has the capability of being adjusted.
The decimation filter used may be part of the processing device or of the AD converter. This allows the formation of multi -bit data words, as~ a result of which simple digital measured -value processing by means of a computer is possible.
The error rate is particularly low in this case.
It is expedient if the processing device comprises an averaging unit to which t:he digital values of one of the input signals can be fed. The output average values formed are then used with the digitized values of the respective other input signal in order to form t=he respective power values. An internal angle error resulting from a temporal offset of the current and voltage signals is thus compensated for.
This can be done, by way of example, as follows: In all instances respectively successive current and voltage values are multiplied dirE:ctly by one another, thereby producing a doubling of power values which, in total, achieve an average -value effect. As am alte~~native, the average value of, for example, two voltage valves adjacent to a current value can also be formed directly and then be multiplied by the current value.
It is expedient if the A:~ converter comprises a sigma -delta modulator. This makes it possible for a digital signal to be formed in a simple manner. This,component makes it possible to achieve good linearity and a high degree of stability in the measured -value processing.
The power values are preferably accumulated in the processing device for the purpose of forming at least one energy value.
By way of example, said energy value can then be stored for accounting or else be summed with further subsequent energy values.
In accordance with one aspect of this invention, there is provided an electrical power measuring device, comprising: a multiplexer for receiving input signals including a current signal and a voltage signal to be measured; an analog-to-digital converter connected to and disposed downstream of said multiplexer, said analog-to-digital converter being a sigma-delta modulator receiving the current signal and the voltage signal and outputting a digital serial signal formed of digitized values of the current signal and the voltage signal; a digital processor connected to and disposed downstream of said sigma-delta modulator and receiving the digital serial signal from said sigma-delta modulator; a decimation filter connected between said sigma-delta modulator and said digital processor; and a control logic unit connected to said decimation filter and generating predeterminable waiting cycles in each case between the digitized values of the current signal and the voltage signal forming the digital serial signal for forming respective power values, said control logic unit driving said decimation filter such that a predetermined phase angle is generated between the digitized values of the current signal and the voltage signal in the digital serial signal.
In accordance with another aspect of this invention, there 2j7936-17 is provided a method for measuring electrical power at a load, which comprises: continuously acquiring current values of a current signal and voltage values of a voltage signal;
using a multiplexer, to generate a common serial signal in which the current and voltage values alternately succeed one another; converting the common serial signal into a 1-bit stream via an analog-to-digital conversion; converting the 1-bit stream into a plurality of multi-bit words representing the alternately successive current and voltage values; using a decimation filter to provide a time delay between each of the multi-bit words representing the alternately successive current and voltage values, the time delay having a length that is adjustable; using a control logic unit to set the length of the time delay between each of the multi-bit words; using the length of the time delay for forming an angular shift between at least some of the alternately successive current and voltage values represented by the multi-bit words; and using immediately successive ones of the multi-bit words for forming respective power values.
The measuring device is preferably used in meters for electrical energy and/or power, integration in a control-device for energy measurement also being conceivable, of course, A preferred design of the measuring device is given in a combination of claims 1 to 5. This combination unites all the advantages for the compensation of external and internal angle errors.
The object in respect of the method is achieved according to the invention by means of the features of claim 6. Simple compensation of an angle error using simple technical means is possible in this way. Moreover, the abovementioned advantages of the measuring device apply to the method mutatis mutandis.
-4a-The serial signal is advantageously an output signal of a rnultiplexer. The use of a particularly simple component is possible as a result of this.
It is expedient if the output signal is subjected to analog -to -digital conversion and a digital signal is generated in the process. Simple downstream digital signal processing is possible in this way. The digital signal is preferably designed as a 1 -bit stream. This affords fast signal processing with few errors. 1 -bit AD converters have a simple analog circuit, the formation of high -resolution digital words in the digital section being afforded.
The 1 -bit stream can subsequently be converted into mufti -bit words, thereby affording conventional digital signal processing in which conventional components, in particular digital signal processors, are used.
During the conversion of the 1 -bit stream into mufti -bit words, waiting cycles are provided between the current and -4b-voltage values, and have a predeterminable length. Adjustable compensation is afforded in this way, it being possible to make use of waitinc- cycles which are possibly present in any case in decimation filters. The jargon also speaks of waiting times in this context.
The power values generatE:d. are preferably accumulated for the purpose of forming an energy value. This affords simple measurement of energy consumption.
Exemplary embodimer..ts of the invention, further advantages, refinements and details are explained in more detail below with reference to the drawing, in which:
Fig. 1 shows a block diagram of a power measuring device, Fig. 2 shows a sigr..al diagram in a basic illustration, Fig. 3 shows a further power measuring device, and Fig. 4 shows a block diagram of a decimation filter according to Fig. 3.
Fig. 1 shows a measuring device la for measuring the electrical power (single -phase) in a basic illustration.
Analog measured values or signals for a current I and a voltage U, which are picked off from an electrical load 2, are fed as input signals to t:he measuring device la. The two input signals I, U are firstly fed to a multiplexer 3. At its output, said multi~~lexer generates a serial signal S, in which the values of the current: signal and of the voltage signal U, I alternately succeed one another. The pairs of signal values which respectively succeed one another in this case are temporally offset with rE:spect to one another with regard to the desired acquisition instant. The serial signal S will be explained in more detail later.
The serial signal :~ is subsequently converted into a digital signal DS with the aid o.. an analog -to -digital converter 5, which digital signal is =red to a decimation filter. The decimation filter 7.1 is at~signed a control logic unit 15. In a digital processing device 7 connected downstream of the decimation filter ~_1, the respective digitized values of the current signal and of the voltage signal I and U, respectively, are multiplied to form power values P, which are then made available at the output for further processing. If appropriate, further processing of the digitized values of the current signal and of the voltage signal I and U may also be provided within the procE~~;sing device 7, said further processing being, by way of example, accumulation, with the result that energy values E are formed.
The processing device 7 :L:; preferably designed as a computer, for example with a microcc>mputer, and/or as a digital signal processor. The power or energy values P or E, respectively, present at the output can be forwarded, by way of example, for transfer to a recoz,ding device or another control device -including for a remote reading possibility or a display device. The power measur_Lr~g device la may, especially, also be part of an electricity meter.
The illustration ac:cordinc~ to Fig. 2 shows further details regarding the signal processing. An excerpt from the digital signal DS fed to tree decimation filter 11 is shown here, current and voltage value's I and U, respectively, being shown in succession. Respectively adjacent current and voltage values I and U, re:>pectively, are temporally offset with respect to one another, as already mentioned above. I1 to I3 and U1 to U3 are u:~ed to mean chronologically successive values. Direct mutt=iplicat:ion of these values by one another in the sense of current --voltage pairs (for example I1 x U1, I2 x U2, etc. ) wou7_d result in an angle error, as already described above.
A first possibility of compensating for internal angle errors is achieved as fol7_ows: :Ln all instances respectively successive current and voltage values (for example the values Ul and Il, Il and LT2, U2 and I2 etc.) are multiplied by one another. Thus, virtually a double number of power values is generated, which power values, although they each comprise an inaccuracy or an angle error, in total attain averaging, thereby affording c:ompen;sation of an internal angle error, e.g. caused by the multipl.exer.
A second possibility of compensating for errors is provided by direct averaging. For th:i~> purpose, by way of example, the average value of U7_ and U2 is formed, i.e. ([U1+U2]/2), which is then multiplied by the current value Il in order to calculate the power. Even further possibilities of simple averaging can also be re<~l.ized. The averaging is carried out in the digital. processing device 7, which comprises a suitable averaging unit, for example a program module, for this purpose.
Fig. 3 shows a furt=her power measuring device 1b in a detailed illustration. In this case, the analog -to -digital converter 5a comprises a sigrla -de:lt:a modulator SD, which generates a 1 -bit stream as the digital. signal DS at its output.
The downstream dig__tal processing device 7a comprises a decimation filter ._1 and a multiplier 13 connected downstream.
The decimation filt=er 11 is used to convert the 1 -bit stream into mufti -bit words. Mufti -bit words can be processed in a particularly simple manner by digital signal processors or microcomputers. This app_~ies in particular to the realization of the multiplier 1.3 connected downstream. The latter operates according to the procedure already described above.
The decimation filter 11 is assigned a control logic unit 15, which affords adju~.tability of the conversion of the 1 -bit stream into mufti -bit words.
Time intervals, waiting times or waiting cycles ti and to are respectively inserted bet=ween the current and voltage values I
and U, respectively, illustrated in Fig. 2. The insertion is effected by the cor..trol ~.ogic unit 15 in this case. In principle, the waiting cycles ti, to are provided for the purpose of avoiding overc:oupling between successive values, in particular the values of current and voltage. In practice, these waiting cycles ti, to are realized as follows: After the formation of a digital value - or better of a mufti -bit word - in the decimation filtE:r 11 the internal multiplexes therein, said multiplexes not being shown in specific detail, is switched over anal the decimation filter 11 is reset for the waiting time. So -called "wait states" are thus generated. In this respect, reference i.s also made to the explanations regarding Fig. 4.
These waiting cycles ti, to are utilized advantageously in the present case. Specifically, the waiting cycles ti, to are designed to be adjustable. This adjustability is parameterizable, e.g. bet:ween 1 and 128 cycles. The waiting time to between the current I1 and the subsequent voltage U2 is fixedly set at, for example, just a few cycles, e.g. 6 cycles. By suitable selection of the waiting cycles ti between the voltage U2 and the subsequent current I2, a phase angle _g_ can be generated and an ar..gle error can thus be compensated for. This applies i.n particular to converter errors, such as occur e.g. in the course of the measured -value acquisition and can be excellently compensated for in this way.
Only a small number of components are necessary in the case of the present measuring device la, 1b. Only a small chip area is necessary in an ASI:C design. The current consumption is very low. In addition, modulation overcoupling via the supply voltage or via the substrate of the ASIC is kept slight.
Fig. 4 shows a pos:>ible design of the decimation filter 11 in detail. It essentially comprises a multiplexes 17, which is assigned, at its outputs,. a respective high -pass filter 19a and 19b for the rep>pective: value of current and voltage. The respectively gener~ited mul.ti -bit values are then present at the outputs, as de:~cribeci above .
It goes without saying that the measuring devices demonstrated are also suitable f:or the processing of further signals, e.g.
for the processing of additional temperature signals, or for polyphase signal processing, e.g. for three -phase current, in which case compens~ition by means of waiting time parameterization according to the method described above can also be provided for the further signals. In principle, alternative compen:~ation by means of a variable window width in the decimation f=filter 1.1 is also conceivable, as a result of which, in principle, a phase angle in the sense described above can likewise be generated. Further technical measures in terms of circuitry or the method may be necessary in this case.
The measuring devices demonstrated are particularly suitable for application in elect:~i_city meters for measuring electrical energy, for examplE: in s=ngle -phase or polyphase domestic meters. It goes without raying that individual features of the various designs can advantageously be combined with one another within the scope of expert skill without leaving the fundamental concept. behind. the idea. What is essential for this purpose is that interpolation is achieved by means of averaging, said interpolation being used to compensate for internal angle errors. Furthermore, adjustable angle -error compensation is afforded by the variable waiting time between the current and voltage values, by means of which external angle errors are also ta~:en into account.
Compensation of external a:~gle errors is afforded in this case without additional measures or further components being required. In addition, the angle error compensation has the capability of being adjusted.
The decimation filter used may be part of the processing device or of the AD converter. This allows the formation of multi -bit data words, as~ a result of which simple digital measured -value processing by means of a computer is possible.
The error rate is particularly low in this case.
It is expedient if the processing device comprises an averaging unit to which t:he digital values of one of the input signals can be fed. The output average values formed are then used with the digitized values of the respective other input signal in order to form t=he respective power values. An internal angle error resulting from a temporal offset of the current and voltage signals is thus compensated for.
This can be done, by way of example, as follows: In all instances respectively successive current and voltage values are multiplied dirE:ctly by one another, thereby producing a doubling of power values which, in total, achieve an average -value effect. As am alte~~native, the average value of, for example, two voltage valves adjacent to a current value can also be formed directly and then be multiplied by the current value.
It is expedient if the A:~ converter comprises a sigma -delta modulator. This makes it possible for a digital signal to be formed in a simple manner. This,component makes it possible to achieve good linearity and a high degree of stability in the measured -value processing.
The power values are preferably accumulated in the processing device for the purpose of forming at least one energy value.
By way of example, said energy value can then be stored for accounting or else be summed with further subsequent energy values.
In accordance with one aspect of this invention, there is provided an electrical power measuring device, comprising: a multiplexer for receiving input signals including a current signal and a voltage signal to be measured; an analog-to-digital converter connected to and disposed downstream of said multiplexer, said analog-to-digital converter being a sigma-delta modulator receiving the current signal and the voltage signal and outputting a digital serial signal formed of digitized values of the current signal and the voltage signal; a digital processor connected to and disposed downstream of said sigma-delta modulator and receiving the digital serial signal from said sigma-delta modulator; a decimation filter connected between said sigma-delta modulator and said digital processor; and a control logic unit connected to said decimation filter and generating predeterminable waiting cycles in each case between the digitized values of the current signal and the voltage signal forming the digital serial signal for forming respective power values, said control logic unit driving said decimation filter such that a predetermined phase angle is generated between the digitized values of the current signal and the voltage signal in the digital serial signal.
In accordance with another aspect of this invention, there 2j7936-17 is provided a method for measuring electrical power at a load, which comprises: continuously acquiring current values of a current signal and voltage values of a voltage signal;
using a multiplexer, to generate a common serial signal in which the current and voltage values alternately succeed one another; converting the common serial signal into a 1-bit stream via an analog-to-digital conversion; converting the 1-bit stream into a plurality of multi-bit words representing the alternately successive current and voltage values; using a decimation filter to provide a time delay between each of the multi-bit words representing the alternately successive current and voltage values, the time delay having a length that is adjustable; using a control logic unit to set the length of the time delay between each of the multi-bit words; using the length of the time delay for forming an angular shift between at least some of the alternately successive current and voltage values represented by the multi-bit words; and using immediately successive ones of the multi-bit words for forming respective power values.
The measuring device is preferably used in meters for electrical energy and/or power, integration in a control-device for energy measurement also being conceivable, of course, A preferred design of the measuring device is given in a combination of claims 1 to 5. This combination unites all the advantages for the compensation of external and internal angle errors.
The object in respect of the method is achieved according to the invention by means of the features of claim 6. Simple compensation of an angle error using simple technical means is possible in this way. Moreover, the abovementioned advantages of the measuring device apply to the method mutatis mutandis.
-4a-The serial signal is advantageously an output signal of a rnultiplexer. The use of a particularly simple component is possible as a result of this.
It is expedient if the output signal is subjected to analog -to -digital conversion and a digital signal is generated in the process. Simple downstream digital signal processing is possible in this way. The digital signal is preferably designed as a 1 -bit stream. This affords fast signal processing with few errors. 1 -bit AD converters have a simple analog circuit, the formation of high -resolution digital words in the digital section being afforded.
The 1 -bit stream can subsequently be converted into mufti -bit words, thereby affording conventional digital signal processing in which conventional components, in particular digital signal processors, are used.
During the conversion of the 1 -bit stream into mufti -bit words, waiting cycles are provided between the current and -4b-voltage values, and have a predeterminable length. Adjustable compensation is afforded in this way, it being possible to make use of waitinc- cycles which are possibly present in any case in decimation filters. The jargon also speaks of waiting times in this context.
The power values generatE:d. are preferably accumulated for the purpose of forming an energy value. This affords simple measurement of energy consumption.
Exemplary embodimer..ts of the invention, further advantages, refinements and details are explained in more detail below with reference to the drawing, in which:
Fig. 1 shows a block diagram of a power measuring device, Fig. 2 shows a sigr..al diagram in a basic illustration, Fig. 3 shows a further power measuring device, and Fig. 4 shows a block diagram of a decimation filter according to Fig. 3.
Fig. 1 shows a measuring device la for measuring the electrical power (single -phase) in a basic illustration.
Analog measured values or signals for a current I and a voltage U, which are picked off from an electrical load 2, are fed as input signals to t:he measuring device la. The two input signals I, U are firstly fed to a multiplexer 3. At its output, said multi~~lexer generates a serial signal S, in which the values of the current: signal and of the voltage signal U, I alternately succeed one another. The pairs of signal values which respectively succeed one another in this case are temporally offset with rE:spect to one another with regard to the desired acquisition instant. The serial signal S will be explained in more detail later.
The serial signal :~ is subsequently converted into a digital signal DS with the aid o.. an analog -to -digital converter 5, which digital signal is =red to a decimation filter. The decimation filter 7.1 is at~signed a control logic unit 15. In a digital processing device 7 connected downstream of the decimation filter ~_1, the respective digitized values of the current signal and of the voltage signal I and U, respectively, are multiplied to form power values P, which are then made available at the output for further processing. If appropriate, further processing of the digitized values of the current signal and of the voltage signal I and U may also be provided within the procE~~;sing device 7, said further processing being, by way of example, accumulation, with the result that energy values E are formed.
The processing device 7 :L:; preferably designed as a computer, for example with a microcc>mputer, and/or as a digital signal processor. The power or energy values P or E, respectively, present at the output can be forwarded, by way of example, for transfer to a recoz,ding device or another control device -including for a remote reading possibility or a display device. The power measur_Lr~g device la may, especially, also be part of an electricity meter.
The illustration ac:cordinc~ to Fig. 2 shows further details regarding the signal processing. An excerpt from the digital signal DS fed to tree decimation filter 11 is shown here, current and voltage value's I and U, respectively, being shown in succession. Respectively adjacent current and voltage values I and U, re:>pectively, are temporally offset with respect to one another, as already mentioned above. I1 to I3 and U1 to U3 are u:~ed to mean chronologically successive values. Direct mutt=iplicat:ion of these values by one another in the sense of current --voltage pairs (for example I1 x U1, I2 x U2, etc. ) wou7_d result in an angle error, as already described above.
A first possibility of compensating for internal angle errors is achieved as fol7_ows: :Ln all instances respectively successive current and voltage values (for example the values Ul and Il, Il and LT2, U2 and I2 etc.) are multiplied by one another. Thus, virtually a double number of power values is generated, which power values, although they each comprise an inaccuracy or an angle error, in total attain averaging, thereby affording c:ompen;sation of an internal angle error, e.g. caused by the multipl.exer.
A second possibility of compensating for errors is provided by direct averaging. For th:i~> purpose, by way of example, the average value of U7_ and U2 is formed, i.e. ([U1+U2]/2), which is then multiplied by the current value Il in order to calculate the power. Even further possibilities of simple averaging can also be re<~l.ized. The averaging is carried out in the digital. processing device 7, which comprises a suitable averaging unit, for example a program module, for this purpose.
Fig. 3 shows a furt=her power measuring device 1b in a detailed illustration. In this case, the analog -to -digital converter 5a comprises a sigrla -de:lt:a modulator SD, which generates a 1 -bit stream as the digital. signal DS at its output.
The downstream dig__tal processing device 7a comprises a decimation filter ._1 and a multiplier 13 connected downstream.
The decimation filt=er 11 is used to convert the 1 -bit stream into mufti -bit words. Mufti -bit words can be processed in a particularly simple manner by digital signal processors or microcomputers. This app_~ies in particular to the realization of the multiplier 1.3 connected downstream. The latter operates according to the procedure already described above.
The decimation filter 11 is assigned a control logic unit 15, which affords adju~.tability of the conversion of the 1 -bit stream into mufti -bit words.
Time intervals, waiting times or waiting cycles ti and to are respectively inserted bet=ween the current and voltage values I
and U, respectively, illustrated in Fig. 2. The insertion is effected by the cor..trol ~.ogic unit 15 in this case. In principle, the waiting cycles ti, to are provided for the purpose of avoiding overc:oupling between successive values, in particular the values of current and voltage. In practice, these waiting cycles ti, to are realized as follows: After the formation of a digital value - or better of a mufti -bit word - in the decimation filtE:r 11 the internal multiplexes therein, said multiplexes not being shown in specific detail, is switched over anal the decimation filter 11 is reset for the waiting time. So -called "wait states" are thus generated. In this respect, reference i.s also made to the explanations regarding Fig. 4.
These waiting cycles ti, to are utilized advantageously in the present case. Specifically, the waiting cycles ti, to are designed to be adjustable. This adjustability is parameterizable, e.g. bet:ween 1 and 128 cycles. The waiting time to between the current I1 and the subsequent voltage U2 is fixedly set at, for example, just a few cycles, e.g. 6 cycles. By suitable selection of the waiting cycles ti between the voltage U2 and the subsequent current I2, a phase angle _g_ can be generated and an ar..gle error can thus be compensated for. This applies i.n particular to converter errors, such as occur e.g. in the course of the measured -value acquisition and can be excellently compensated for in this way.
Only a small number of components are necessary in the case of the present measuring device la, 1b. Only a small chip area is necessary in an ASI:C design. The current consumption is very low. In addition, modulation overcoupling via the supply voltage or via the substrate of the ASIC is kept slight.
Fig. 4 shows a pos:>ible design of the decimation filter 11 in detail. It essentially comprises a multiplexes 17, which is assigned, at its outputs,. a respective high -pass filter 19a and 19b for the rep>pective: value of current and voltage. The respectively gener~ited mul.ti -bit values are then present at the outputs, as de:~cribeci above .
It goes without saying that the measuring devices demonstrated are also suitable f:or the processing of further signals, e.g.
for the processing of additional temperature signals, or for polyphase signal processing, e.g. for three -phase current, in which case compens~ition by means of waiting time parameterization according to the method described above can also be provided for the further signals. In principle, alternative compen:~ation by means of a variable window width in the decimation f=filter 1.1 is also conceivable, as a result of which, in principle, a phase angle in the sense described above can likewise be generated. Further technical measures in terms of circuitry or the method may be necessary in this case.
The measuring devices demonstrated are particularly suitable for application in elect:~i_city meters for measuring electrical energy, for examplE: in s=ngle -phase or polyphase domestic meters. It goes without raying that individual features of the various designs can advantageously be combined with one another within the scope of expert skill without leaving the fundamental concept. behind. the idea. What is essential for this purpose is that interpolation is achieved by means of averaging, said interpolation being used to compensate for internal angle errors. Furthermore, adjustable angle -error compensation is afforded by the variable waiting time between the current and voltage values, by means of which external angle errors are also ta~:en into account.
Claims (8)
1. An electrical power measuring device, comprising:
a multiplexer for receiving input signals including a current signal and a voltage signal to be measured;
an analog-to-digital converter connected to and disposed downstream of said multiplexer, said analog-to-digital converter being a sigma-delta modulator receiving the current signal and the voltage signal and outputting a digital serial signal formed of digitized values of the current signal and the voltage signal;
a digital processor connected to and disposed downstream of said sigma-delta modulator and receiving the digital serial signal from said sigma-delta modulator;
a decimation filter connected between said sigma-delta modulator and said digital processor; and a control logic unit connected to said decimation filter and generating predeterminable waiting cycles in each case between the digitized values of the current signal and the voltage signal forming the digital serial signal for forming respective power values, said control logic unit driving said decimation filter such that a predetermined phase angle is generated between the digitized values of the current signal and the voltage signal in the digital serial signal.
a multiplexer for receiving input signals including a current signal and a voltage signal to be measured;
an analog-to-digital converter connected to and disposed downstream of said multiplexer, said analog-to-digital converter being a sigma-delta modulator receiving the current signal and the voltage signal and outputting a digital serial signal formed of digitized values of the current signal and the voltage signal;
a digital processor connected to and disposed downstream of said sigma-delta modulator and receiving the digital serial signal from said sigma-delta modulator;
a decimation filter connected between said sigma-delta modulator and said digital processor; and a control logic unit connected to said decimation filter and generating predeterminable waiting cycles in each case between the digitized values of the current signal and the voltage signal forming the digital serial signal for forming respective power values, said control logic unit driving said decimation filter such that a predetermined phase angle is generated between the digitized values of the current signal and the voltage signal in the digital serial signal.
2. The measuring device according to claim 1, wherein said digital processor has an averaging unit receiving the digitized values of the current signal and the voltage signal, said averaging unit outputting average values used to form the respective power values with the digitized values of a respective other input signal.
3. The measuring device according to claim 2, wherein the average values are formed by the digitized values of the voltage signal.
4. The measuring device according to claim 1, wherein the respective power values are accumulated in said digital processor for forming at least one energy value.
5. The measuring device according to claim 1, wherein said multiplexer, said digital processor, said decimation filter, said control logic unit and said sigma-delta modulator form an electricity meter.
6. A method for measuring electrical power at a load, which comprises:
continuously acquiring current values of a current signal and voltage values of a voltage signal;
using a multiplexer, to generate a common serial signal in which the current and voltage values alternately succeed one another;
converting the common serial signal into a 1-bit stream via an analog-to-digital conversion;
converting the 1-bit stream into a plurality of multi-bit words representing the alternately successive current and voltage values;
using a decimation filter to provide a time delay between each of the multi-bit words representing the alternately successive current and voltage values, the time delay having a length that is adjustable;
using a control logic unit to set the length of the time delay between each of the multi-bit words;
using the length of the time delay for forming an angular shift between at least some of the alternately successive current and voltage values represented by the multi-bit words;
and using immediately successive ones of the multi-bit words for forming respective power values.
continuously acquiring current values of a current signal and voltage values of a voltage signal;
using a multiplexer, to generate a common serial signal in which the current and voltage values alternately succeed one another;
converting the common serial signal into a 1-bit stream via an analog-to-digital conversion;
converting the 1-bit stream into a plurality of multi-bit words representing the alternately successive current and voltage values;
using a decimation filter to provide a time delay between each of the multi-bit words representing the alternately successive current and voltage values, the time delay having a length that is adjustable;
using a control logic unit to set the length of the time delay between each of the multi-bit words;
using the length of the time delay for forming an angular shift between at least some of the alternately successive current and voltage values represented by the multi-bit words;
and using immediately successive ones of the multi-bit words for forming respective power values.
7. The method according to claim 6, which comprises multiplying directly the successive ones of the multi-bit words by one another during the using step.
8. The method according to claim 6, which comprises accumulating the respective power values for forming an energy value.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19639410A DE19639410A1 (en) | 1996-09-25 | 1996-09-25 | Measuring device for electrical power |
| DE19639410.4 | 1996-09-25 | ||
| PCT/DE1997/002164 WO1998013699A1 (en) | 1996-09-25 | 1997-09-24 | Electrical power measuring device and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2266721A1 CA2266721A1 (en) | 1998-04-02 |
| CA2266721C true CA2266721C (en) | 2004-05-25 |
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ID=7806874
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002266721A Expired - Lifetime CA2266721C (en) | 1996-09-25 | 1997-09-24 | Measuring device for electrical power and method for measuring the electrical power |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6239589B1 (en) |
| EP (1) | EP0928423B1 (en) |
| CA (1) | CA2266721C (en) |
| DE (2) | DE19639410A1 (en) |
| WO (1) | WO1998013699A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB9813982D0 (en) | 1998-06-30 | 1998-08-26 | Mem Limited | Residual current detection device |
| GB0000067D0 (en) * | 2000-01-06 | 2000-02-23 | Delta Electrical Limited | Current detector and current measurement apparatus including such detector with temparature compensation |
| ES2356520T3 (en) * | 2000-09-15 | 2011-04-08 | Radian Research, Inc. | PROCEDURES AND APPLIANCES FOR ANALOG-DIGITAL CONVERSION. |
| US6590380B2 (en) | 2000-12-11 | 2003-07-08 | Thomas G. Edel | Method and apparatus for compensation of current transformer error |
| DE10104064C1 (en) * | 2001-01-29 | 2002-10-10 | Siemens Metering Ag Zug | Compensation circuit for phase shift in electricity meters for direct connection |
| US7249265B2 (en) * | 2001-02-23 | 2007-07-24 | Power Measurement, Ltd. | Multi-featured power meter with feature key |
| US6943714B2 (en) * | 2002-08-19 | 2005-09-13 | Tdk Semiconductor Corporation | Method and apparatus of obtaining power computation parameters |
| SI21581A (en) * | 2003-07-15 | 2005-02-28 | Iskraemeco | Integrated circuit for power meters with polarity detection |
| DE10334517B4 (en) * | 2003-07-29 | 2006-06-14 | Texas Instruments Deutschland Gmbh | Meter for electrical energy for an AC network |
| DE10361664B4 (en) * | 2003-12-30 | 2009-08-13 | Austriamicrosystems Ag | Energy counter arrangement |
| DE102004010707B4 (en) * | 2004-03-04 | 2013-08-22 | Austriamicrosystems Ag | Energy meter arrangement and method for calibration |
| US7830874B2 (en) * | 2006-02-03 | 2010-11-09 | Itron, Inc. | Versatile radio packeting for automatic meter reading systems |
| US20080068213A1 (en) * | 2006-07-26 | 2008-03-20 | Cornwall Mark K | Managing serial numbering of encoder-receiver-transmitter devices in automatic meter reading systems |
| US8436744B2 (en) * | 2009-01-29 | 2013-05-07 | Itron, Inc. | Prioritized collection of meter readings |
| US20100265095A1 (en) * | 2009-04-20 | 2010-10-21 | Itron, Inc. | Endpoint classification and command processing |
| US8836319B2 (en) * | 2010-10-29 | 2014-09-16 | Siemens Aktiengesellschaft | Method for measuring the current level of an alternating current |
| KR101234879B1 (en) * | 2011-09-27 | 2013-02-19 | 한국전력공사 | Apparatus and method for power computation |
| CN103364601B (en) * | 2012-03-31 | 2015-07-08 | 盛吉高科（北京）科技有限公司 | Period average and delay window-based electric energy measurement method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CH557033A (en) * | 1972-09-04 | 1974-12-13 | Bauer Messinstrumente Ag | PROCEDURE AND EQUIPMENT FOR THE DERIVATION OF DIGITAL MEASUREMENTS ON ELECTRICITY NETWORKS. |
| DE2630959C2 (en) * | 1976-07-07 | 1986-04-30 | Heliowatt Werke Elektrizitäts- Gesellschaft mbH, 1000 Berlin | Kilowatt hour meter with static measuring mechanism |
| DE3126485A1 (en) * | 1981-07-04 | 1983-01-20 | Metrawatt GmbH, 8500 Nürnberg | Measuring arrangement |
| DE3205840A1 (en) * | 1981-07-08 | 1983-01-27 | LGZ Landis & Gyr Zug AG, 6301 Zug | Measurement value conditioner |
| BR8305189A (en) * | 1982-09-24 | 1984-05-02 | Sangamo Weston | ALMOST ASYNCHRONOUS SAMPLING PROCESS AND SYSTEM |
| DE3414520A1 (en) * | 1984-04-17 | 1985-10-24 | Fr. Sauter AG, Fabrik elektr. Apparate, Basel | ELECTRONIC ENERGY CONSUMER AND METHOD FOR MEASURING ELECTRICAL ENERGY WITH AN ENERGY CONSUMER |
| CH673714A5 (en) * | 1985-05-02 | 1990-03-30 | Zellweger Uster Ag | |
| IL92412A0 (en) * | 1988-12-02 | 1990-07-26 | Gen Electric | Electronic meter digital phase compensation |
| US5301121A (en) * | 1991-07-11 | 1994-04-05 | General Electric Company | Measuring electrical parameters of power line operation, using a digital computer |
| DE4221057C2 (en) * | 1992-06-26 | 1997-02-13 | Texas Instruments Deutschland | Method of recording electrical energy consumption |
| JP3080207B2 (en) * | 1993-01-06 | 2000-08-21 | 三菱電機株式会社 | Electronic watt-hour meter |
| CH689471A5 (en) * | 1994-05-05 | 1999-04-30 | Landis & Gyr Tech Innovat | Summer for products of similar or different signals e.g. for electricity meter |
| US5548540A (en) * | 1994-06-24 | 1996-08-20 | General Electric Company | Decimation filter having a selectable decimation ratio |
| US5463569A (en) * | 1994-06-24 | 1995-10-31 | General Electric Company | Decimation filter using a zero-fill circuit for providing a selectable decimation ratio |
| EP0699914B1 (en) * | 1994-09-05 | 2005-01-05 | Landis+Gyr AG | Electricity meter |
-
1996
- 1996-09-25 DE DE19639410A patent/DE19639410A1/en not_active Withdrawn
-
1997
- 1997-09-24 EP EP97909184A patent/EP0928423B1/en not_active Expired - Lifetime
- 1997-09-24 WO PCT/DE1997/002164 patent/WO1998013699A1/en active IP Right Grant
- 1997-09-24 CA CA002266721A patent/CA2266721C/en not_active Expired - Lifetime
- 1997-09-24 DE DE59701980T patent/DE59701980D1/en not_active Expired - Lifetime
-
1999
- 1999-03-25 US US09/275,825 patent/US6239589B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP0928423B1 (en) | 2000-07-05 |
| EP0928423A1 (en) | 1999-07-14 |
| DE59701980D1 (en) | 2000-08-10 |
| CA2266721A1 (en) | 1998-04-02 |
| US6239589B1 (en) | 2001-05-29 |
| DE19639410A1 (en) | 1998-04-02 |
| WO1998013699A1 (en) | 1998-04-02 |
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