CN102507994B - Power signal source capable of providing frequency division dynamic waveforms - Google Patents
Power signal source capable of providing frequency division dynamic waveforms Download PDFInfo
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Abstract
The invention discloses a power signal source capable of providing frequency division dynamic waveforms, which comprises a communication interface module, a single chip machine module, a waveform data storage module, a phase-locked loop scanning module, a waveform digital-to-analogue conversion module and a waveform output operational amplifier, wherein the communication interface module is used for receiving a working state control signal of the power signal source; the single chip machine module is connected to the communication interface module and used for controlling the working state of the power signal source and outputting waveform working frequency; the waveform data storage module is connected to the single chip machine module and used for caching the output waveforms and phase information of the power signal source; the phase-locked loop scanning module is connected between the single chip machine module and the waveform data storage module and used for controlling output waveform frequency and phase information synthetization; the waveform digital-to-analogue conversion module is connected to the waveform data storage module and used for converting the digital output waveform information into the analogue output waveform signals; and the waveform output operational amplifier is connected to the waveform digital-to-analogue conversion module and used for amplifying analogue output model signals. The power meter detected by adopting the power signal source is capable of undertaking the missions of monitoring and managing the gird quality and measuring and metering the electric energy.
Description
Technical field
The present invention relates to a kind of electric power source signal, especially relate to a kind of electric power source signal that frequency division dynamic waveform is provided.
Background technology
Be accompanied by further developing of the industrialization of the country, the input of electronics, power equipment increases year by year, the large-scale redevelopment of State Grid's capital construction especially in recent years and lifting, the load exponentially of national grid doubly increases, electric network pollution is day by day serious, security on the reliability of operation of power networks and electronic product use has produced great impact, so also day by day come into one's own for supervision, measurement, metering and the management role of power grid quality.
To the supervision of power grid quality, measurement, metering and management role, is at present mainly to realize by professional checkout equipment, but this traditional equipment purchasing, detects and set up that mode cost is high, efficiency is low, can not meet the demand that industrialization of the country development is built.Consider, the annual electric energy meter output approximately 200,000,000 in the whole nation, accounts for 2% in harmonic electric energy meter, the accumulative total several years nearly 10,000,000 more than at present, it has covered each big and medium-sized cities, the whole nation, and the electric energy meter that this batch is eager to come into operation, because of without practicable detection means, is difficult to trace to the source, part can only be made supervisory instrument and use, only be confined to traditional electric energy tariffing task, especially have the harmonic electric energy meter of advanced computing power, the so simple utilization of electric energy meter has caused the serious wasting of resources.Causing the basic reason of phenomenon like this, is exactly conventional electric energy meter calibrating apparatus, and frequency division dynamic waveform signal cannot be provided, and also just cannot the metering under each harmonic wave state examine and determine harmonic electric energy meter.
Summary of the invention
Technical matters to be solved by this invention, is just to provide a kind of electric power source signal that frequency division dynamic waveform is provided.
Above-mentioned technical matters, solves by following technical measures:
The electric power source signal that frequency division dynamic waveform is provided, is characterized in that, comprising:
One-chip computer module 1, includes independent clock unit in it, for controlling and output waveform frequency of operation;
Wave data memory module 2, is both-end parallel port RAM, for the waveform phase information of buffer memory one-chip computer module 1 output;
Phaselocked loop scan module 3, includes phase-locked loop chip and CPLD chip, synthetic for controlling output waveform frequency and phase information;
Amplitude D/A converter module 4, is the one 16 parallel port D/A converter, for converting digital output waveform information to simulation output waveform signals;
5, the 2 16 parallel port D/A converters of waveform D/A converter module, for converting digital output waveform information to simulation output waveform signals; For converting the waveform of digital output waveform, phase information to simulation output waveform signals;
Waveform output operational amplifier 6, for amplifying analog output signal;
Voltage reference module 7, for output reference voltage;
Communication interface modules 8, for receiving and dispatching control signal;
Amplitude output amplifier module 9, for amplifying analog output signal;
Described one-chip computer module 1 receives and feedback control signal by communication interface modules 8, and the data of output waveform, address signal are to data port and the address mouth of the Wave data memory module 2 of described both-end parallel port; The amplitude signal of output waveform is to the inlet end data port of described amplitude D/A converter module 4, and independent clock unit outputting standard clock signal is to the phase-locked loop chip of described phaselocked loop scan module 3;
The reference voltage that the described voltage reference module 7 of REF mouth input of described amplitude D/A converter module 4 is exported, output amplitude signal is to amplitude output amplifier module 9;
The CPLD chip OPADD sweep signal of described phaselocked loop scan module 3 is to the endpiece address mouth of described Wave data memory module 2;
The endpiece data output of described Wave data memory module 2 exports the data port of described waveform D/A converter module 5 to, the output of the REF mouth input amplitude output amplifier module 9 of described waveform D/A converter module 5, the output waveform signals of described waveform output operational amplifier 6 incoming wave shape D/A converter modules 5, last output frequency division dynamic waveform.
On the basis of the above, the present invention can also do further improvement:
In order to export sliding waveform signal, also comprise for the digital regulation resistance 10 of output index waveform signal with for the totalizer 11 of superpose sine wave signal and exponential waveform signal; Described digital regulation resistance 10 is connected between the output terminal and Voltage Reference end (ground connection) of described amplitude output operational amplifier 9, the control end of digital regulation resistance 10 is connected to the corresponding port of described one-chip computer module, the output terminal of the center tap of digital regulation resistance and described waveform output operational amplifier 6 is connected to respectively the in-phase input end of totalizer, the waveform output terminal that the output terminal of totalizer 11 is electric power source signal by the first resistance and the second resistance.
Electric power source signal of the present invention adopts the structure of high-speed microprocessor, dual-port parallel port storer and digital to analog converter to realize, and the mode with digital processing simulation output, can provide diversified frequency division dynamic waveform signal according to actual needs;
Beneficial effect of the present invention is as follows:
The electric power source signal that frequency division dynamic waveform is provided of the present invention, the electric power signal of frequency division dynamic waveform can be provided, metering to harmonic electric energy meter under each harmonic wave state is examined and determine, make harmonic electric energy meter can be born the supervision of power grid quality, measurement, metering and management role, saved greatly national resources.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail:
Fig. 1 is the schematic block circuit diagram of electric power source signal embodiment mono-of the present invention;
Fig. 2 is the signal flow graph that shown in Fig. 1, electric power source signal embodiment exports half-wave/triggering waveform;
Fig. 3 is that electric power source signal embodiment shown in Fig. 1 exports the signal flow graph that impacts sine waveform;
Fig. 4 is the signal flow graph of the sliding waveform of output of embodiment bis-.
Embodiment
Fig. 1 shows the embodiment mono-of electric power source signal of the present invention, comprises one-chip computer module 1, includes independent clock unit in it, for controlling and output waveform frequency of operation; Wave data memory module 2, is both-end parallel port RAM, for the waveform phase information of buffer memory one-chip computer module 1 output; Phaselocked loop scan module 3, includes phase-locked loop chip and CPLD chip, synthetic for controlling output waveform frequency and phase information; Amplitude D/A converter module 4, is the one 16 parallel port D/A converter, for converting digital output waveform information to simulation output waveform signals; 5, the 2 16 parallel port D/A converters of waveform D/A converter module, for converting digital output waveform information to simulation output waveform signals, for converting the waveform of digital output waveform, phase information to simulation output waveform signals; Waveform output operational amplifier 6, for amplifying analog output signal; Voltage reference module 7, for output reference voltage; Communication interface modules 8, for receiving and dispatching control signal; Amplitude output amplifier module 9, for amplifying analog output signal.
One-chip computer module 1 receives and feedback control signal by communication interface modules 8, and the data of output waveform, address signal are to data port and the address mouth of the Wave data memory module 2 of described both-end parallel port; The amplitude signal of output waveform is to the inlet end data port of described amplitude D/A converter module 4, and independent clock unit outputting standard clock signal is to the phase-locked loop chip of phaselocked loop scan module 3; The reference voltage of REF mouth input voltage base modules 7 outputs of amplitude D/A converter module 4, output amplitude signal are to amplitude output amplifier module 9; The CPLD chip OPADD sweep signal of phaselocked loop scan module 3 is to the endpiece address mouth of Wave data memory module 2; The endpiece data output of Wave data memory module 2 exports the data port of waveform D/A converter module 5 to, the output of the REF mouth input amplitude output amplifier module 9 of waveform D/A converter module 5, the output waveform signals of waveform output operational amplifier 6 incoming wave shape D/A converter modules 5, last output frequency division dynamic waveform.
One-chip computer module 1 comprises high-speed microprocessor, independent clock unit, external crystal-controlled oscillation and timer, and independent clock unit, external crystal-controlled oscillation and timer are connected to the corresponding port of high-speed microprocessor.Independent clock unit, for generation of the reference frequency of electric power source signal, does not take single-chip microcomputer working time and storage space.External crystal-controlled oscillation proportion is the crystal oscillator of 22.118400M, and this is a comparatively compromise scheme, has both guaranteed the speed of system, has guaranteed again the stability of system.Timer is sixteen bit, the timer of four machine cycles, for the frequency control of electric power source signal output signal.Because level signal turns pulse signal, be equivalent to two divided-frequency, thereby the actual divide ratio of the present embodiment electric power source signal is: (frequency division)/50Hz (desired value)=55296(divide ratio 11059200Hz (crystal oscillator frequency)/4(machine cycle)/2).This value is less than 65536, meets the job requirement of sixteen bit timer.The frequency adjustment fineness of the present embodiment electric power source signal is 50Hz/55296, is better than 50Hz/50000=0.001Hz.
Wave data memory module 2 adopts both-end parallel port storer, for storing the high resolving power all-wave waveform signal of one-period, determines the phase place of output waveform, can repeat to write.Its memory allocation is horizontal resolution 72000, and each fundamental signal cycle is divided into 72000 points, and corresponding phase adjusted fineness is 360 degree/72000=0.005 degree; Vertical resolution is 65536, and such resolution can meet less distortion requirement.
Voltage reference module 7 adopts the high stability standard of precision voltage that model is LM399, and its degree of stability is 20PPM, for reference voltage is provided.Described amplitude D/A converter module 4 adopts sixteen bit D/A converter, for the digital-to-analog conversion of waveform signal amplitude data.Therefore, the amplitude of the present embodiment electric power source signal regulates fineness to be: 1/65536 * 100% is better than 1/50000 * 100%=0.002%.
Phaselocked loop scan module 3 comprises phase-locked loop chip, CPLD chip and external circuit, and phase-locked loop chip connects the independent clock unit in one-chip computer module 1, and CPLD chip connects the address B port of Wave data memory module 2.Waveform D/A converter module 5 adopts sixteen bit D/A converter, for the digital-to-analog conversion of waveform signal Wave data.Amplifier module comprises at least two independently operational amplifiers.Communication interface modules 8 adopts RS232 communication interface.
The principle of work of the present embodiment electric power source signal is:
The high-resolution 1/4 cycle fundamental waveform of one-chip computer module 1 internal storage, according to Real output waveform requirement, table look-up in inside, and its all-wave waveform is mapped directly in Wave data memory module 2.Independent clock unit output 50Hz reference frequency pulse in one-chip computer module 1, the work of starting high-speed phase-locked loop scan module, CPLD CPLD in phaselocked loop scan module 3, both made frequency multiplier, OPADD sweep trace, to 2 scannings of Wave data memory module, outputs to waveform D/A converter module 5 by Wave data simultaneously, by waveform output operational amplifier 6, export satisfactory analog waveform again.
Below in conjunction with the electric power source signal of Fig. 2～3 explanation above-described embodiment, export the course of work of 2 kinds of special dynamic waveforms:
As shown in Figure 2, for the electric power source signal of above-described embodiment, export the signal flow graph of half-wave/triggering waveform.Because of a complete fundamental waveform, can be divided into 4 quadrants, each quadrant took for 1/4 cycle, one-chip computer module 1 is mapped to the sine wave of its one-period in Wave data memory module 2, divide the storage area of Wave data memory module 2 into quarter, be made as respectively A, B, C, D, corresponding 4 the sinusoidal wave quadrants of its difference.When communication interface modules 8 is exported the instruction of half waveform to one-chip computer module 1 input requirements electric power source signal, one-chip computer module 1 will be deposited C, the D region data writing " 0 " of the Wave data memory module 2 of waveform, the waveform through the 3 scanning outputs of phaselocked loop scan module is half-wave, pass through again waveform D/A converter module 5 and waveform output operational amplifier 6, export satisfactory simulation half-wave voltage signal.In like manner, when communication interface modules 8 triggers the instruction of waveform to one-chip computer module 1 input requirements electric power source signal output phase, 1 of one-chip computer module need be by the A of Wave data memory module 2, C region data writing " 0 ".
As shown in Figure 3, for the electric power source signal output of above-described embodiment, impact the signal flow graph of sine waveform.Because impacting sinusoidal wave feature, be that sinusoidal wave amplitude changes in time between Ib and Fi * Ib, according to this feature, when communication interface modules 8 impacts the instruction of sine waveform to one-chip computer module 1 input requirements electric power source signal output, timer in one-chip computer module 1 be take the standard 50Hz recurrence interval as minimum time of day, set as requested and impact the sinusoidal wave time interval changing, switch the input data of amplitude D/A converter module 4, its output, by amplitude output operational amplifier incoming wave shape D/A converter module 5, for waveform D/A converter module 5 provides benchmark input, the change of this benchmark, can directly have influence on sine wave output amplitude must change, thereby sine waveform is impacted in output.The switching time of above-mentioned amplitude D/A converter module 4 input data, because the present embodiment electric power source signal is to adopt high-speed microprocessor and parallel port D/A converter, substantially can ignore.In assembly language, switch approximately 14 instructions, 4 machine cycles of every treaty, switching time: 4 * 14/22.1184M=2.5 μ S, and sine wave period is 20mS, so account for the ratio of a sine wave period switching time, be: 2.5mS/20mS * 100%=0.0125%, it is satisfactory that the result of sine waveform is impacted in the output of the present embodiment electric power source signal.
As shown in Figure 4, be embodiments of the invention two, on the basis of embodiment mono-, also comprise for the digital regulation resistance 10 of output index waveform signal with for the totalizer 11 of superpose sine wave signal and exponential waveform signal; Digital regulation resistance 10 is connected between the output terminal and Voltage Reference end (ground connection) of amplitude output operational amplifier 9, the control end of digital regulation resistance 10 is connected to the corresponding port of one-chip computer module, the output terminal of the center tap of digital regulation resistance and waveform output operational amplifier 6 is connected to respectively the in-phase input end of totalizer, the waveform output terminal that the output terminal of totalizer 11 is electric power source signal by the first resistance and the second resistance.
Fig. 4 is the signal flow graph of the sliding waveform of electric power source signal output.
Because sliding the essence of waveform, be a fundamental waveform, an e superposes
-atdirect current signal obtain.So, when communication interface modules 8 is slided the instruction of waveform to one-chip computer module 1 input requirements electric power source signal output, in the high-speed microprocessor in one-chip computer module 1, preset e
-atthe amplitude data form that (1～7 sine wave period) changes in time, the sixteen bit timer in one-chip computer module 1 adopts interrupt mode, successively the data in form is write to digital regulation resistance, and the center tap of digital regulation resistance exports e
-atwaveform signal, the sine waveform signal of this waveform signal and 6 outputs of waveform output operational amplifier is superposeed and is exported sliding waveform by totalizer.Because digital regulation resistance adopts the specification of inner 100 taps, so changing fineness, it is enough to meet the fineness requirement that sliding waveform changes, the electric power source signal of the present embodiment can be exported gratifying sliding waveform.
Claims (2)
1. can provide an electric power source signal for frequency division dynamic waveform, it is characterized in that comprising:
One-chip computer module (1), includes independent clock unit in it, for controlling and output waveform frequency of operation;
Wave data memory module (2), is both-end parallel port RAM, for waveform, the phase information of buffer memory one-chip computer module (1) output;
Phaselocked loop scan module (3), includes phase-locked loop chip and CPLD chip, synthetic for controlling output waveform frequency and phase information;
Amplitude D/A converter module (4) is the one 16 parallel port D/A converter, for converting the amplitude information of digital output waveform to simulation output waveform signals;
Waveform D/A converter module (5), the 2 16 parallel port D/A converter, for converting the waveform of digital output waveform, phase information to simulation output waveform signals;
Waveform output operational amplifier (6), for amplifying the first analog output signal;
Voltage reference module (7), for output reference voltage;
Communication interface modules (8), for receiving and dispatching control signal;
Amplitude output amplifier module (9), for amplifying the second analog output signal;
Described one-chip computer module (1) receives and feedback control signal by communication interface modules (8), and the data of output waveform, address signal are to data port and the address mouth of the Wave data memory module (2) of described both-end parallel port; The amplitude signal of output waveform is to the inlet end data port of described amplitude D/A converter module (4), and independent clock unit outputting standard clock signal is to the phase-locked loop chip of described phaselocked loop scan module (3);
The reference voltage that the described voltage reference module (7) of REF mouth input of described amplitude D/A converter module (4) is exported, output amplitude signal are to amplitude output amplifier module (9);
The CPLD chip OPADD sweep signal of described phaselocked loop scan module (3) is to the endpiece address mouth of described Wave data memory module (2);
The endpiece data output of described Wave data memory module (2) exports the data port of described waveform D/A converter module (5) to, the output of the REF mouth input amplitude output amplifier module (9) of described waveform D/A converter module (5), the output waveform signals of described waveform output operational amplifier (6) incoming wave shape D/A converter module (5), last output frequency division dynamic waveform.
2. the electric power source signal that frequency division dynamic waveform is provided according to claim 1, is characterized in that: also comprise for the digital regulation resistance (10) of output index waveform signal with for the totalizer (11) of superpose sine wave signal and exponential waveform signal; Described digital regulation resistance (10) is connected between the output terminal and Voltage Reference end of described amplitude output amplifier module (9), the control end of digital regulation resistance (10) is connected to the corresponding port of described one-chip computer module, the output terminal of the center tap of digital regulation resistance and described waveform output operational amplifier (6) is connected to respectively the in-phase input end of totalizer, the waveform output terminal that the output terminal of totalizer (11) is electric power source signal by the first resistance and the second resistance.
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| CN102937019A (en) * | 2012-10-22 | 2013-02-20 | 西安石油大学 | Weak signal generation device |
| CN104569900B (en) * | 2013-10-14 | 2017-12-12 | 北京化工大学 | Intelligent electric energy meter dynamic error test device |
| CN104345294B (en) * | 2014-11-04 | 2017-09-29 | 国家电网公司 | A kind of electric energy meter dynamic performance and testing |
| CN104391142A (en) * | 2014-12-22 | 2015-03-04 | 永新电子常熟有限公司 | Novel convenient signal generator |
| CN107017795B (en) * | 2017-03-31 | 2019-04-30 | 德力西(杭州)变频器有限公司 | Pulse-generator circuit and its control method |
| CN113359550B (en) * | 2021-06-03 | 2023-08-29 | 广州地铁集团有限公司 | FSK data monitoring equipment based on FPGA |
| CN116400290B (en) * | 2023-03-23 | 2024-03-19 | 中国电力科学研究院有限公司 | Harmonic signal source generating circuit |
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