US20080284532A1 - Voltage- and temperature-compensated rc oscillator circuit - Google Patents
Voltage- and temperature-compensated rc oscillator circuit Download PDFInfo
- Publication number
- US20080284532A1 US20080284532A1 US12/182,329 US18232908A US2008284532A1 US 20080284532 A1 US20080284532 A1 US 20080284532A1 US 18232908 A US18232908 A US 18232908A US 2008284532 A1 US2008284532 A1 US 2008284532A1
- Authority
- US
- United States
- Prior art keywords
- coupled
- mos transistor
- channel mos
- output
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
- H03K3/0231—Astable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
- H03L1/02—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
- H03L1/022—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
Definitions
- the present invention relates to integrated circuits. More particularly, the present invention relates to a voltage-compensated and temperature-compensated RC oscillator circuit for an integrated circuit.
- Integrated circuits have previously been provided with on-board oscillator circuits, including both RC oscillator circuits and crystal oscillator circuits.
- RC oscillator circuits are not known for frequency stability and are susceptible to both voltage-supply instability and temperature instability.
- An integrated voltage-compensated and temperature-compensated RC oscillator is disclosed.
- FIG. 1 is a schematic diagram of an illustrative integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit of the present invention.
- FIG. 2 is a schematic diagram of an illustrative voltage-compensation circuit that may be employed in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit of FIG. 1 .
- FIGS. 3A and 3B are schematic diagrams of illustrative temperature-compensation circuits that may be employed in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit of FIG. 1 .
- FIG. 1 a schematic diagram shows an illustrative integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit 10 according to the present invention.
- the output of inverter 12 drives an RC network including resistor 14 coupled between the output of inverter 12 and one plate of capacitor 16 .
- the second plate of capacitor 16 is coupled to ground.
- the node common to resistor 14 and capacitor 16 is coupled to the non-inverting input of a first analog comparator 18 and the inverting input of a second analog comparator 20 .
- Both analog comparators 18 and 20 are temperature compensated according to the present invention as will be further disclosed herein.
- the inverting input of the first analog comparator 18 and the non-inverting input of the second analog comparator 20 are coupled to a voltage divider network including resistors 22 , 24 , and 26 coupled in series between V CC and ground. Resistors 22 , 24 , and 26 are equal in value such that the trip point of first analog comparator 18 is always 2 ⁇ 3 V CC and the trip point of the second comparator 20 is always 1 ⁇ 3 V CC . As will be appreciated by persons of ordinary skill in the art, these comparator trip points are independent of variations in V CC because the voltage division is fixed as a function of the fixed-value resistors 22 , 24 , and 26 .
- first analog comparator 18 is coupled to the set input S of set-reset flip-flop 28 .
- second analog comparator 20 is coupled to the reset input R! of set-reset flip-flop 28 .
- the Q output of set-reset flip-flop 28 is coupled to the input of inverter 12 .
- FIG. 2 a schematic diagram shows an illustrative voltage-compensation circuit 30 that may be employed in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit of FIG. 1 in accordance with the present invention.
- Band-gap reference circuit 32 drives the inverting input of operational amplifier 34 .
- the output of operational amplifier 34 drives the gate of n-channel MOS transistor 36 .
- the source of n-channel MOS transistor 36 is grounded.
- Three resistors 38 , 40 and 42 are connected as a series voltage divider between V CC and ground. Resistor 32 has a value that is much smaller than the values of resistors 40 and 42 , whose values are equal.
- n-channel MOS transistor 36 The drain of n-channel MOS transistor 36 is coupled to the common connection of resistors 38 and 40 and the non-inverting input of operational amplifier 34 is coupled to the common connection of resistors 40 and 42 .
- This circuit provides a very stable voltage at the gate of n-channel MOS transistor 36 .
- Diode-connected p-channel MOS transistor 44 is coupled in series with n-channel MOS transistor 46 between V CC and ground.
- N-channel MOS transistor 46 has its gate coupled to the gate of n-channel MOS transistor 36 .
- P-channel MOS transistor 48 is connected to p-channel MOS transistor 44 as a current mirror.
- P-channel MOS transistor 50 is turned on because its gate is coupled to ground and it generates the current I REF1 at its source.
- P-channel MOS transistor 52 is also connected to p-channel MOS transistor 44 as a current mirror. If p-channel MOS transistor 54 is turned on using trim-bit switch line 56 , it will contribute to the current I REF at its source, which is connected in common with the source of p-channel MOS transistor 50 .
- P-channel MOS transistor 58 is also connected to p-channel MOS transistor 44 as a current mirror. If p-channel MOS transistor 60 is turned on using trim-bit switch line 62 , it will contribute to the current I REF1 at its source, which is connected in common with the source of p-channel MOS transistor 50 . In the illustrative circuit of FIG. 2 , the value of I REF1 can be set to one of three values. Persons of ordinary skill in the art will appreciate that, if additional switched or unswitched p-channel and n-channel transistor pairs are provided, additional levels of I REF1 current can be selectively generated to trim the value of I REF1 at wafer sort.
- P-channel MOS transistor 64 is connected to p-channel MOS transistor 44 as a current mirror.
- P-channel MOS transistor 66 is turned on because its gate is coupled to ground and it generates the current I REF2 at its source.
- P-channel MOS transistor 68 is also connected to p-channel MOS transistor 44 as a current mirror. If p-channel MOS transistor 70 is turned on using trim-bit switch line 72 , it will contribute to the current I REF2 at its source, which is connected in common with the source of p-channel MOS transistor 66 .
- N-channel MOS transistor 74 is also connected to p-channel MOS transistor 44 as a current mirror.
- p-channel MOS transistor 76 If p-channel MOS transistor 76 is turned on using trim-bit switch line 78 , it will contribute to the current I REF2 at its source, which is connected in common with the source of p-channel MOS transistor 66 .
- the sources of p-channel MOS transistors 66 , 70 , and 76 are coupled to the gate and drain of n-channel MOS transistor 80 .
- N-channel MOS transistor 82 is coupled to n-channel MOS transistor 80 as a current mirror.
- the current ⁇ I REF2 is at the drain of n-channel MOS transistor 82 .
- the current ⁇ I REF2 is opposite in sign to the current I REF1 .
- the value of ⁇ I REF2 can also be set to one of three values.
- Persons of ordinary skill in the art will appreciate that, if additional switched or unswitched p-channel and n-channel transistor pairs are provided, additional levels of ⁇ I REF2 current can be selectively generated to trim the value of ⁇ I REF2 at wafer sort.
- FIG. 3A is a schematic diagram of an illustrative temperature-compensated analog comparator circuit 90 that may be employed as analog comparator 20 in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit of FIG. 1 .
- P-channel MOS transistors 92 and 94 and n-channel MOS transistors 96 and 98 are configured as a differential amplifier with bias transistor 100 coupled between the sources of n-channel MOS transistors 96 and 98 and ground.
- the gate of n-channel MOS transistor 96 serves as the non-inverting input 102 of the comparator and the gate of n-channel MOS transistor 98 serves as the inverting input 104 of the comparator.
- the output of the comparator is the common connection of the drains of p-channel MOS transistor 94 and n-channel MOS transistor 98 .
- the gate of n-channel MOS bias transistor 100 is driven from diode-connected n-channel MOS transistor 106 and thus mirrors I REF1 .
- Diode-connected p-channel MOS transistor 108 may be optionally coupled between the sources of p-channel MOS transistors 92 and 94 and V CC in order to bias the sources of p-channel MOS transistors 92 and 94 at a V T below V CC as is known in the art.
- the widths of n-channel MOS transistors 96 and 98 are the same and are equal to A.
- the width of p-channel MOS transistor 92 is equal to B and the width of p-channel MOS transistor 94 is equal to B/2.
- A may be equal to 20 microns and B may be equal to 10 microns.
- the analog comparator 90 of FIG. 3A is temperature compensated. As the temperature increases, the tendency of a differential amplifier circuit is to switch at a later point in time given the same voltage input conditions. By differently sizing the p-channel MOS transistors 92 and 94 such that p-channel MOS transistor 94 is smaller than p-channel MOS transistor 92 as shown in FIG. 3A , the trip point of the circuit tends to occur earlier in time than if both p-channel transistors had been sized the same, thus compensating for the temperature shift. As the ratio between the sizes of p-channel MOS transistors 92 and 94 increases, the amount of temperature compensation increases.
- FIG. 3B is a schematic diagram of an illustrative temperature-compensated analog comparator circuit 110 that may be employed as analog comparator 18 in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit of FIG. 1 .
- N-channel MOS transistors 112 and 114 and p-channel MOS transistors 116 and 118 are configured as a differential amplifier with bias transistor 120 coupled between the sources of p-channel MOS transistors 116 and 118 and V CC .
- the gate of p-channel MOS transistor 116 serves as the inverting input 122 of the comparator and the gate of p-channel MOS transistor 118 serves as the non-inverting input 124 of the comparator.
- the output of the comparator is the common connection of the drains of n-channel MOS transistor 114 and p-channel MOS transistor 118 .
- the gate of p-channel MOS bias transistor 120 is driven from diode-connected n-channel MOS transistor 126 and thus mirrors I REF2 .
- Diode-connected n-channel MOS transistor 128 may be optionally coupled between the sources of p-channel MOS transistors 112 and 114 and ground in order to bias the sources of n-channel MOS transistors 112 and 114 at a V T above ground as is known in the art.
- the widths of p-channel MOS transistors 116 and 118 are the same and are equal to C.
- the width of n-channel MOS transistor 112 is equal to D and the width of n-channel MOS transistor 114 is equal to D/2.
- C may be equal to 40 microns and D may be equal to 5 microns.
- the analog comparator 90 of FIG. 3B is temperature compensated. As the temperature increases, the tendency of a differential amplifier circuit is to switch at a later point in time given the same voltage input conditions. By differently sizing the n-channel MOS transistors 112 and 114 such that n-channel MOS transistor 114 is smaller than n-channel MOS transistor 112 as shown in FIG. 3B , the trip point of the circuit tends to occur earlier in time than if both n-channel transistors had been sized the same, thus compensating for the temperature shift. As the ratio between the sizes of n-channel MOS transistors 112 and 114 increases, the amount of temperature compensation increases.
Abstract
An integrated temperature-compensated RC oscillator circuit includes an inverter having an input and an output. An RC network is coupled between the inverter and a pair of comparators. A first comparator has an inverting input coupled to a first reference voltage, a non-inverting input coupled to the RC network, and an output. A second comparator has an inverting input coupled to the RC network, a non-inverting input coupled to a second reference voltage, and an output. A set-reset flip-flop has a set input coupled to the output of the first comparator, a reset input coupled to the output of the second comparator, and an output coupled to the input of the inverter. Differential amplifiers in the comparators each have a diode-connected p-channel MOS transistor controlling a mirrored p-channel MOS transistor whose channel width is less than that of the diode-connected p-channel current mirror transistor.
Description
- This application is a continuation of co-pending U.S. patent application Ser. No. 11/467,475, filed Aug. 25, 2006, which is a continuation of U.S. patent application Ser. No. 11/022,331, filed Dec. 21, 2004, now issued as U.S. Pat. No. 7,116,181, both of which are hereby incorporated by reference as if set forth herein.
- 1. Field of the Invention
- The present invention relates to integrated circuits. More particularly, the present invention relates to a voltage-compensated and temperature-compensated RC oscillator circuit for an integrated circuit.
- 2. Background
- Integrated circuits have previously been provided with on-board oscillator circuits, including both RC oscillator circuits and crystal oscillator circuits. RC oscillator circuits are not known for frequency stability and are susceptible to both voltage-supply instability and temperature instability.
- An integrated voltage-compensated and temperature-compensated RC oscillator is disclosed.
- A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description of the invention and accompanying drawings, which set forth an illustrative embodiment in which the principles of the invention are utilized.
-
FIG. 1 is a schematic diagram of an illustrative integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit of the present invention. -
FIG. 2 is a schematic diagram of an illustrative voltage-compensation circuit that may be employed in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit ofFIG. 1 . -
FIGS. 3A and 3B are schematic diagrams of illustrative temperature-compensation circuits that may be employed in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit ofFIG. 1 . - Those of ordinary skill in the art will realize that the following description of the present invention is illustrative only and not in any way limiting. Other embodiments of the invention will readily suggest themselves to such skilled persons.
- Referring first to
FIG. 1 , a schematic diagram shows an illustrative integrated-circuit voltage-compensated and temperature-compensatedRC oscillator circuit 10 according to the present invention. The output ofinverter 12 drives an RCnetwork including resistor 14 coupled between the output ofinverter 12 and one plate ofcapacitor 16. The second plate ofcapacitor 16 is coupled to ground. - The node common to
resistor 14 andcapacitor 16 is coupled to the non-inverting input of a firstanalog comparator 18 and the inverting input of a second analog comparator 20. Bothanalog comparators 18 and 20 are temperature compensated according to the present invention as will be further disclosed herein. - The inverting input of the first
analog comparator 18 and the non-inverting input of the second analog comparator 20 are coupled to a voltage dividernetwork including resistors Resistors analog comparator 18 is always ⅔ VCC and the trip point of the second comparator 20 is always ⅓ VCC. As will be appreciated by persons of ordinary skill in the art, these comparator trip points are independent of variations in VCC because the voltage division is fixed as a function of the fixed-value resistors - The output of first
analog comparator 18 is coupled to the set input S of set-reset flip-flop 28. The output of second analog comparator 20 is coupled to the reset input R! of set-reset flip-flop 28. The Q output of set-reset flip-flop 28 is coupled to the input ofinverter 12. - Referring now to
FIG. 2 , a schematic diagram shows an illustrative voltage-compensation circuit 30 that may be employed in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit ofFIG. 1 in accordance with the present invention. Band-gap reference circuit 32 drives the inverting input ofoperational amplifier 34. The output ofoperational amplifier 34 drives the gate of n-channel MOS transistor 36. The source of n-channel MOS transistor 36 is grounded. Threeresistors resistors channel MOS transistor 36 is coupled to the common connection ofresistors operational amplifier 34 is coupled to the common connection ofresistors channel MOS transistor 36. - Diode-connected p-
channel MOS transistor 44 is coupled in series with n-channel MOS transistor 46 between VCC and ground. N-channel MOS transistor 46 has its gate coupled to the gate of n-channel MOS transistor 36. P-channel MOS transistor 48 is connected to p-channel MOS transistor 44 as a current mirror. P-channel MOS transistor 50 is turned on because its gate is coupled to ground and it generates the current IREF1 at its source. P-channel MOS transistor 52 is also connected to p-channel MOS transistor 44 as a current mirror. If p-channel MOS transistor 54 is turned on using trim-bit switch line 56, it will contribute to the current IREF at its source, which is connected in common with the source of p-channel MOS transistor 50. P-channel MOS transistor 58 is also connected to p-channel MOS transistor 44 as a current mirror. If p-channel MOS transistor 60 is turned on using trim-bit switch line 62, it will contribute to the current IREF1 at its source, which is connected in common with the source of p-channel MOS transistor 50. In the illustrative circuit ofFIG. 2 , the value of IREF1 can be set to one of three values. Persons of ordinary skill in the art will appreciate that, if additional switched or unswitched p-channel and n-channel transistor pairs are provided, additional levels of IREF1 current can be selectively generated to trim the value of IREF1 at wafer sort. - P-
channel MOS transistor 64 is connected to p-channel MOS transistor 44 as a current mirror. P-channel MOS transistor 66 is turned on because its gate is coupled to ground and it generates the current IREF2 at its source. P-channel MOS transistor 68 is also connected to p-channel MOS transistor 44 as a current mirror. If p-channel MOS transistor 70 is turned on using trim-bit switch line 72, it will contribute to the current IREF2 at its source, which is connected in common with the source of p-channel MOS transistor 66. N-channel MOS transistor 74 is also connected to p-channel MOS transistor 44 as a current mirror. If p-channel MOS transistor 76 is turned on using trim-bit switch line 78, it will contribute to the current IREF2 at its source, which is connected in common with the source of p-channel MOS transistor 66. The sources of p-channel MOS transistors channel MOS transistor 80. N-channel MOS transistor 82 is coupled to n-channel MOS transistor 80 as a current mirror. As can be seen by persons of ordinary skill in the art, the current −IREF2 is at the drain of n-channel MOS transistor 82. The current −IREF2 is opposite in sign to the current IREF1. - In the illustrative circuit of
FIG. 2 , the value of −IREF2 can also be set to one of three values. Persons of ordinary skill in the art will appreciate that, if additional switched or unswitched p-channel and n-channel transistor pairs are provided, additional levels of −IREF2 current can be selectively generated to trim the value of −IREF2 at wafer sort. -
FIG. 3A is a schematic diagram of an illustrative temperature-compensatedanalog comparator circuit 90 that may be employed as analog comparator 20 in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit ofFIG. 1 . P-channel MOS transistors channel MOS transistors bias transistor 100 coupled between the sources of n-channel MOS transistors channel MOS transistor 96 serves as thenon-inverting input 102 of the comparator and the gate of n-channel MOS transistor 98 serves as the inverting input 104 of the comparator. The output of the comparator is the common connection of the drains of p-channel MOS transistor 94 and n-channel MOS transistor 98. The gate of n-channelMOS bias transistor 100 is driven from diode-connected n-channel MOS transistor 106 and thus mirrors IREF1. Diode-connected p-channel MOS transistor 108 may be optionally coupled between the sources of p-channel MOS transistors channel MOS transistors - As may be seen from an examination of
FIG. 3A , the widths of n-channel MOS transistors channel MOS transistor 92 is equal to B and the width of p-channel MOS transistor 94 is equal to B/2. In an illustrative non-limiting embodiment of the invention A may be equal to 20 microns and B may be equal to 10 microns. - The
analog comparator 90 ofFIG. 3A is temperature compensated. As the temperature increases, the tendency of a differential amplifier circuit is to switch at a later point in time given the same voltage input conditions. By differently sizing the p-channel MOS transistors channel MOS transistor 94 is smaller than p-channel MOS transistor 92 as shown inFIG. 3A , the trip point of the circuit tends to occur earlier in time than if both p-channel transistors had been sized the same, thus compensating for the temperature shift. As the ratio between the sizes of p-channel MOS transistors -
FIG. 3B is a schematic diagram of an illustrative temperature-compensatedanalog comparator circuit 110 that may be employed asanalog comparator 18 in the integrated-circuit voltage-compensated and temperature-compensated RC oscillator circuit ofFIG. 1 . N-channel MOS transistors channel MOS transistors bias transistor 120 coupled between the sources of p-channel MOS transistors channel MOS transistor 116 serves as the invertinginput 122 of the comparator and the gate of p-channel MOS transistor 118 serves as thenon-inverting input 124 of the comparator. The output of the comparator is the common connection of the drains of n-channel MOS transistor 114 and p-channel MOS transistor 118. The gate of p-channelMOS bias transistor 120 is driven from diode-connected n-channel MOS transistor 126 and thus mirrors IREF2. Diode-connected n-channel MOS transistor 128 may be optionally coupled between the sources of p-channel MOS transistors channel MOS transistors - As may be seen from an examination of
FIG. 3B , the widths of p-channel MOS transistors channel MOS transistor 112 is equal to D and the width of n-channel MOS transistor 114 is equal to D/2. In an illustrative non-limiting embodiment of the invention C may be equal to 40 microns and D may be equal to 5 microns. - The
analog comparator 90 ofFIG. 3B is temperature compensated. As the temperature increases, the tendency of a differential amplifier circuit is to switch at a later point in time given the same voltage input conditions. By differently sizing the n-channel MOS transistors channel MOS transistor 114 is smaller than n-channel MOS transistor 112 as shown inFIG. 3B , the trip point of the circuit tends to occur earlier in time than if both n-channel transistors had been sized the same, thus compensating for the temperature shift. As the ratio between the sizes of n-channel MOS transistors - While embodiments and applications of this invention have been shown and described, it would be apparent to those skilled in the art that many more modifications than mentioned above are possible without departing from the inventive concepts herein. The invention, therefore, is not to be restricted except in the spirit of the appended claims.
Claims (1)
1. An integrated temperature-compensated RC oscillator circuit including:
an inverter having an input and an output;
a resistor having a first terminal and a second terminal, the first terminal coupled to the output of the inverter;
a capacitor coupled between the second terminal of the resistor and a fixed potential;
a first analog comparator having an inverting input coupled to a first reference voltage, a non-inverting input coupled to the second terminal of the resistor, and an output;
a second analog comparator having a non-inverting input coupled to the second terminal of the resistor, an inverting input coupled to a second reference voltage, and an output;
a set-reset flip-flop having a set input coupled to the output of the first analog comparator, a reset input coupled to the output of the second analog comparator, and an output coupled to the input of the inverter;
the first and second analog comparators comprising differential amplifiers each having a diode-connected current mirror MOS transistor in series with a non-inverting-input MOS transistor and a mirrored MOS transistor in series with an inverting-input transistor, the diode-connected current mirror MOS transistor having a width larger than the width of the mirrored MOS transistor, the differential amplifier further having a MOS bias transistor having a drain coupled to the sources of the inverting-input and non-inverting-input input transistors, a source coupled to ground, and a gate coupled to a bias-voltage supply.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/182,329 US20080284532A1 (en) | 2004-12-21 | 2008-07-30 | Voltage- and temperature-compensated rc oscillator circuit |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/022,331 US7116181B2 (en) | 2004-12-21 | 2004-12-21 | Voltage- and temperature-compensated RC oscillator circuit |
US11/467,475 US7439818B2 (en) | 2004-12-21 | 2006-08-25 | Voltage-and temperature-compensated RC oscillator circuit |
US12/182,329 US20080284532A1 (en) | 2004-12-21 | 2008-07-30 | Voltage- and temperature-compensated rc oscillator circuit |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/467,475 Continuation US7439818B2 (en) | 2004-12-21 | 2006-08-25 | Voltage-and temperature-compensated RC oscillator circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
US20080284532A1 true US20080284532A1 (en) | 2008-11-20 |
Family
ID=36594933
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/022,331 Active 2025-04-01 US7116181B2 (en) | 2004-12-21 | 2004-12-21 | Voltage- and temperature-compensated RC oscillator circuit |
US11/467,475 Active US7439818B2 (en) | 2004-12-21 | 2006-08-25 | Voltage-and temperature-compensated RC oscillator circuit |
US12/182,329 Abandoned US20080284532A1 (en) | 2004-12-21 | 2008-07-30 | Voltage- and temperature-compensated rc oscillator circuit |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/022,331 Active 2025-04-01 US7116181B2 (en) | 2004-12-21 | 2004-12-21 | Voltage- and temperature-compensated RC oscillator circuit |
US11/467,475 Active US7439818B2 (en) | 2004-12-21 | 2006-08-25 | Voltage-and temperature-compensated RC oscillator circuit |
Country Status (4)
Country | Link |
---|---|
US (3) | US7116181B2 (en) |
EP (1) | EP1829201A2 (en) |
JP (1) | JP2008524962A (en) |
WO (1) | WO2006068942A2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9024693B2 (en) | 2013-06-06 | 2015-05-05 | Industrial Technology Research Institute | Crystal-less clock generator and operation method thereof |
US9685238B2 (en) | 2015-07-09 | 2017-06-20 | Samsung Electronics Co., Ltd. | Clock signal generation device and memory device including the same |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7116181B2 (en) * | 2004-12-21 | 2006-10-03 | Actel Corporation | Voltage- and temperature-compensated RC oscillator circuit |
KR100910460B1 (en) | 2007-07-03 | 2009-08-04 | 삼성전기주식회사 | Oscillator having variable frequency |
US7889018B2 (en) * | 2007-12-21 | 2011-02-15 | Sandisk Corporation | Low VT dependency RC oscillator |
US8149047B2 (en) | 2008-03-20 | 2012-04-03 | Mediatek Inc. | Bandgap reference circuit with low operating voltage |
TWI355804B (en) * | 2008-09-22 | 2012-01-01 | Etron Technology Inc | A voltage control oscillator without being affecte |
US8330500B2 (en) * | 2010-11-25 | 2012-12-11 | Elite Semiconductor Memory Technology Inc. | Comparator |
CN102185476B (en) * | 2011-05-05 | 2015-05-27 | 无锡三石电子有限公司 | DC (direct-current) power supply with temperature-controlled output |
KR20140094095A (en) * | 2013-01-21 | 2014-07-30 | 삼성전자주식회사 | Temperature controlled oscillator and temperature sensor including the same |
CN103595244B (en) * | 2013-12-01 | 2016-03-09 | 西安电子科技大学 | There is the relaxation oscillator of frequency jittering function |
CN103888137A (en) * | 2014-03-18 | 2014-06-25 | 深圳创维-Rgb电子有限公司 | Oscillator and electronic terminal |
US9287823B1 (en) * | 2014-09-15 | 2016-03-15 | Nuvoton Technology Corporation | Method and apparatus of a self-biased RC oscillator and ramp generator |
GB2533299A (en) * | 2014-12-15 | 2016-06-22 | Nordic Semiconductor Asa | Differential comparator |
CN105958943B (en) * | 2016-04-21 | 2018-12-04 | 新茂国际科技股份有限公司 | relaxation oscillator |
CN107222170A (en) * | 2017-05-30 | 2017-09-29 | 长沙方星腾电子科技有限公司 | A kind of pierce circuit |
CN107171643A (en) * | 2017-05-30 | 2017-09-15 | 长沙方星腾电子科技有限公司 | A kind of pierce circuit |
CN107689774A (en) * | 2017-07-21 | 2018-02-13 | 芯海科技(深圳)股份有限公司 | A kind of high frequency Low Drift Temperature RC oscillators |
CN108494366A (en) * | 2018-03-12 | 2018-09-04 | 京东方科技集团股份有限公司 | Oscillator and electronic equipment |
CN109559773B (en) * | 2018-11-23 | 2021-08-20 | 中国科学院上海微系统与信息技术研究所 | Temperature self-adaptive compensation circuit of SRAM sequential circuit at ultralow temperature |
CN109995364B (en) * | 2019-03-06 | 2020-08-04 | 杭州城芯科技有限公司 | Frequency synthesizer based on digital temperature compensation circuit |
CN115913119A (en) * | 2021-08-23 | 2023-04-04 | 雅特力科技股份有限公司 | Resistance-capacitance oscillator with shared circuit architecture |
Citations (63)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4503494A (en) * | 1980-06-26 | 1985-03-05 | Texas Instruments Incorporated | Non-volatile memory system |
US4513258A (en) * | 1983-07-01 | 1985-04-23 | Motorola, Inc. | Single input oscillator circuit |
US4758745A (en) * | 1986-09-19 | 1988-07-19 | Actel Corporation | User programmable integrated circuit interconnect architecture and test method |
US4855954A (en) * | 1985-03-04 | 1989-08-08 | Lattice Semiconductor Corporation | In-system programmable logic device with four dedicated terminals |
US4870302A (en) * | 1984-03-12 | 1989-09-26 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4879688A (en) * | 1985-03-04 | 1989-11-07 | Lattice Semiconductor Corporation | In-system programmable logic device |
US5101122A (en) * | 1990-02-06 | 1992-03-31 | Mitsubishi Denki Kabushiki Kaisha | Programmable logic device |
US5132571A (en) * | 1990-08-01 | 1992-07-21 | Actel Corporation | Programmable interconnect architecture having interconnects disposed above function modules |
US5237218A (en) * | 1991-05-03 | 1993-08-17 | Lattice Semiconductor Corporation | Structure and method for multiplexing pins for in-system programming |
US5237699A (en) * | 1988-08-31 | 1993-08-17 | Dallas Semiconductor Corp. | Nonvolatile microprocessor with predetermined state on power-down |
US5451912A (en) * | 1994-06-13 | 1995-09-19 | Cypress Semiconductor Corp. | Methods and apparatus for a programmable frequency generator that requires no dedicated programming pins |
US5559449A (en) * | 1994-02-18 | 1996-09-24 | Sgs-Thomson Microelectronics S.R.L. | Programmable logic array structure for semiconductor nonvolatile memories, particularly flash-eeproms |
US5563526A (en) * | 1994-01-03 | 1996-10-08 | Texas Instruments Incorporated | Programmable mixed-mode integrated circuit architecture |
US5638418A (en) * | 1993-02-05 | 1997-06-10 | Dallas Semiconductor Corporation | Temperature detector systems and methods |
US5684434A (en) * | 1995-10-30 | 1997-11-04 | Cypress Semiconductor | Erasable and programmable single chip clock generator |
US5687325A (en) * | 1996-04-19 | 1997-11-11 | Chang; Web | Application specific field programmable gate array |
US5719533A (en) * | 1995-09-27 | 1998-02-17 | Matsushita Electric Industrial Col., Ltd. | Function generator |
US5811987A (en) * | 1995-06-02 | 1998-09-22 | Advanced Micro Devices, Inc. | Block clock and initialization circuit for a complex high density PLD |
US5821776A (en) * | 1997-01-31 | 1998-10-13 | Actel Corporation | Field programmable gate array with mask programmed analog function circuits |
US5889701A (en) * | 1998-06-18 | 1999-03-30 | Xilinx, Inc. | Method and apparatus for selecting optimum levels for in-system programmable charge pumps |
US5949987A (en) * | 1995-08-09 | 1999-09-07 | Xilinx, Inc. | Efficient in-system programming structure and method for non-volatile programmable logic devices |
US5999014A (en) * | 1997-09-17 | 1999-12-07 | Xilinx, Inc. | Method for concurrently programming or accessing a plurality of in-system-programmable logic devices |
US6034541A (en) * | 1997-04-07 | 2000-03-07 | Lattice Semiconductor Corporation | In-system programmable interconnect circuit |
US6091641A (en) * | 1997-11-18 | 2000-07-18 | Stmicroelectronics S.A. | Non-volatile memory device and method for the programming of the same |
US6104257A (en) * | 1997-12-22 | 2000-08-15 | Cypress Semiconductor Corp. | Crystal oscillator with eprom-controlled frequency trim |
US6134707A (en) * | 1996-11-14 | 2000-10-17 | Altera Corporation | Apparatus and method for in-system programming of integrated circuits containing programmable elements |
US6145020A (en) * | 1998-05-14 | 2000-11-07 | Advanced Technology Materials, Inc. | Microcontroller incorporating an enhanced peripheral controller for automatic updating the configuration date of multiple peripherals by using a ferroelectric memory array |
US6150837A (en) * | 1997-02-28 | 2000-11-21 | Actel Corporation | Enhanced field programmable gate array |
US6191660B1 (en) * | 1999-03-24 | 2001-02-20 | Cypress Semiconductor Corp. | Programmable oscillator scheme |
US6243842B1 (en) * | 1998-06-08 | 2001-06-05 | Stmicroelectronics, Inc. | Method and apparatus for operating on a memory unit via a JTAG port |
US6260087B1 (en) * | 1999-03-03 | 2001-07-10 | Web Chang | Embedded configurable logic ASIC |
US6272646B1 (en) * | 1996-09-04 | 2001-08-07 | Cypress Semiconductor Corp. | Programmable logic device having an integrated phase lock loop |
US6304099B1 (en) * | 1998-05-21 | 2001-10-16 | Lattice Semiconductor Corporation | Method and structure for dynamic in-system programming |
US20010030554A1 (en) * | 2000-02-14 | 2001-10-18 | Stmicroelectronics S.R.L. | Programmable logic arrays |
US6334208B1 (en) * | 1999-08-11 | 2001-12-25 | Xilinx, Inc. | Method and apparatus for in-system programming with a status bit |
US20020007467A1 (en) * | 1998-12-30 | 2002-01-17 | Ma Edward Tang Kwai | Microcontroller with a user configurable pulse width modulator |
US6346905B1 (en) * | 1998-11-27 | 2002-02-12 | Stmicroelectronics S.R.L. | Analog-to-digital flash converter for generating a thermometric digital code |
US6356161B1 (en) * | 1998-03-19 | 2002-03-12 | Microchip Technology Inc. | Calibration techniques for a precision relaxation oscillator integrated circuit with temperature compensation |
US6389321B2 (en) * | 1997-11-04 | 2002-05-14 | Lattice Semiconductor Corporation | Simultaneous wired and wireless remote in-system programming of multiple remote systems |
US6414368B1 (en) * | 1982-11-26 | 2002-07-02 | Stmicroelectronics Limited | Microcomputer with high density RAM on single chip |
US6415344B1 (en) * | 1998-04-29 | 2002-07-02 | Stmicroelectronics Limited | System and method for on-chip communication |
US20020108006A1 (en) * | 2000-10-26 | 2002-08-08 | Warren Snyder | Microcontroller programmable system on a chip |
US6442068B1 (en) * | 1999-07-30 | 2002-08-27 | Stmicroelectronics S.R.L. | Non-volatile memory with functional capability of burst mode read and page mode read during suspension of an operation of electrical alteration |
US6483344B2 (en) * | 2001-01-31 | 2002-11-19 | Stmicroelectronics, Inc. | Interconnect circuitry for implementing logic functions in a field programmable gate array and method of operation |
US6490714B1 (en) * | 1996-11-27 | 2002-12-03 | Altera Corporation | Apparatus and method for in-system programming of a field programmable logic device using device-specific characterization data |
US20030001614A1 (en) * | 2001-06-29 | 2003-01-02 | Stmicroelectronics Pvt. Ltd. | Field programmable logic device with efficient memory utilization |
US20030005402A1 (en) * | 2001-06-29 | 2003-01-02 | Stmicroelectronics Ltd. | System for simplifying the programmable memory to logic interface in FPGA |
US6526557B1 (en) * | 2000-07-25 | 2003-02-25 | Xilinx, Inc. | Architecture and method for partially reconfiguring an FPGA |
US20030074637A1 (en) * | 2001-10-16 | 2003-04-17 | Marco Pavesi | Clock generation system for a prototyping apparatus |
US6552935B2 (en) * | 2001-08-02 | 2003-04-22 | Stmicroelectronics, Inc. | Dual bank flash memory device and method |
US6594192B1 (en) * | 2000-08-31 | 2003-07-15 | Stmicroelectronics, Inc. | Integrated volatile and non-volatile memory |
US6600355B1 (en) * | 2002-06-10 | 2003-07-29 | Xilinx, Inc. | Clock generator circuit providing an output clock signal from phased input clock signals |
US6614320B1 (en) * | 2000-10-26 | 2003-09-02 | Cypress Semiconductor Corporation | System and method of providing a programmable clock architecture for an advanced microcontroller |
US20030210585A1 (en) * | 2002-03-14 | 2003-11-13 | Stmicroelectronics S.R.I. | Non-volatile memory device |
US6651199B1 (en) * | 2000-06-22 | 2003-11-18 | Xilinx, Inc. | In-system programmable flash memory device with trigger circuit for generating limited duration program instruction |
US20030214321A1 (en) * | 2002-04-05 | 2003-11-20 | Stmicroelectronics Pvt. Ltd. | Architecture for programmable logic device |
US20030213599A1 (en) * | 2002-05-20 | 2003-11-20 | Tinker Donald W. | Whipstock collet latch |
US6674332B1 (en) * | 2002-09-06 | 2004-01-06 | Cypress Semiconductor, Corp. | Robust clock circuit architecture |
US20040008055A1 (en) * | 2002-05-29 | 2004-01-15 | Stmicroelectronics Pvt. Ltd. | Programmable logic devices providing reduced power consumption |
US20040036500A1 (en) * | 2002-08-08 | 2004-02-26 | Bratt Adrian Harvey | Semiconductor devices |
US6753739B1 (en) * | 1999-03-24 | 2004-06-22 | Cypress Semiconductor Corp. | Programmable oscillator scheme |
US6924709B2 (en) * | 2003-10-10 | 2005-08-02 | Standard Microsystems Corporation | Integrated relaxation oscillator with improved sensitivity to component variation due to process-shift |
US7116181B2 (en) * | 2004-12-21 | 2006-10-03 | Actel Corporation | Voltage- and temperature-compensated RC oscillator circuit |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5453948A (en) * | 1977-10-07 | 1979-04-27 | Hitachi Ltd | Oscillation circuit |
JPS6139718A (en) * | 1984-07-31 | 1986-02-25 | Toshiba Corp | Voltage detecting circuit |
JPS61107810A (en) * | 1984-10-31 | 1986-05-26 | Toshiba Corp | Voltage controlled oscillating circuit |
JPS62173507A (en) * | 1986-01-27 | 1987-07-30 | Toshiba Corp | Constant potential difference generating circuit |
NL8701831A (en) * | 1987-08-04 | 1989-03-01 | Philips Nv | OSCILLATOR WITH FREQUENCY STABILIZERS. |
JPH01215114A (en) * | 1988-02-23 | 1989-08-29 | Nec Corp | Semiconductor integrated circuit |
JPH02224518A (en) * | 1989-02-27 | 1990-09-06 | Oki Electric Ind Co Ltd | Cr oscillation circuit |
JPH0775322B2 (en) * | 1990-02-22 | 1995-08-09 | 富士通株式会社 | Semiconductor integrated circuit device |
JPH05160692A (en) * | 1991-12-03 | 1993-06-25 | Nippon Telegr & Teleph Corp <Ntt> | Voltage comparator |
JP2799535B2 (en) * | 1992-10-16 | 1998-09-17 | 三菱電機株式会社 | Reference current generation circuit |
JP2556265B2 (en) * | 1993-07-23 | 1996-11-20 | 日本電気株式会社 | Semiconductor integrated circuit |
JP3304539B2 (en) * | 1993-08-31 | 2002-07-22 | 富士通株式会社 | Reference voltage generation circuit |
US5564526A (en) * | 1995-08-21 | 1996-10-15 | Barnard; Charles E. | Magnetic drain plug |
JP4060424B2 (en) * | 1998-02-03 | 2008-03-12 | 沖電気工業株式会社 | Drive circuit for charge pump circuit |
JP4015319B2 (en) * | 1999-07-12 | 2007-11-28 | 富士通株式会社 | Constant current generation circuit and differential amplifier circuit |
JP2002043898A (en) * | 2000-07-24 | 2002-02-08 | Mitsubishi Electric Corp | Oscillation circuit and oscillating method |
JP2002057556A (en) * | 2000-08-10 | 2002-02-22 | New Japan Radio Co Ltd | Cr oscillation circuit |
-
2004
- 2004-12-21 US US11/022,331 patent/US7116181B2/en active Active
-
2005
- 2005-12-15 WO PCT/US2005/045621 patent/WO2006068942A2/en active Application Filing
- 2005-12-15 EP EP05854360A patent/EP1829201A2/en not_active Withdrawn
- 2005-12-15 JP JP2007548329A patent/JP2008524962A/en active Pending
-
2006
- 2006-08-25 US US11/467,475 patent/US7439818B2/en active Active
-
2008
- 2008-07-30 US US12/182,329 patent/US20080284532A1/en not_active Abandoned
Patent Citations (73)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4503494A (en) * | 1980-06-26 | 1985-03-05 | Texas Instruments Incorporated | Non-volatile memory system |
US6414368B1 (en) * | 1982-11-26 | 2002-07-02 | Stmicroelectronics Limited | Microcomputer with high density RAM on single chip |
US4513258A (en) * | 1983-07-01 | 1985-04-23 | Motorola, Inc. | Single input oscillator circuit |
US4870302A (en) * | 1984-03-12 | 1989-09-26 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4855954A (en) * | 1985-03-04 | 1989-08-08 | Lattice Semiconductor Corporation | In-system programmable logic device with four dedicated terminals |
US4879688A (en) * | 1985-03-04 | 1989-11-07 | Lattice Semiconductor Corporation | In-system programmable logic device |
US4758745B1 (en) * | 1986-09-19 | 1994-11-15 | Actel Corp | User programmable integrated circuit interconnect architecture and test method |
US4758745A (en) * | 1986-09-19 | 1988-07-19 | Actel Corporation | User programmable integrated circuit interconnect architecture and test method |
US5237699A (en) * | 1988-08-31 | 1993-08-17 | Dallas Semiconductor Corp. | Nonvolatile microprocessor with predetermined state on power-down |
US5101122A (en) * | 1990-02-06 | 1992-03-31 | Mitsubishi Denki Kabushiki Kaisha | Programmable logic device |
US5132571A (en) * | 1990-08-01 | 1992-07-21 | Actel Corporation | Programmable interconnect architecture having interconnects disposed above function modules |
US5336951A (en) * | 1991-05-03 | 1994-08-09 | Lattice Semiconductor Corporation | Structure and method for multiplexing pins for in-system programming |
US5237218A (en) * | 1991-05-03 | 1993-08-17 | Lattice Semiconductor Corporation | Structure and method for multiplexing pins for in-system programming |
US5638418A (en) * | 1993-02-05 | 1997-06-10 | Dallas Semiconductor Corporation | Temperature detector systems and methods |
US5563526A (en) * | 1994-01-03 | 1996-10-08 | Texas Instruments Incorporated | Programmable mixed-mode integrated circuit architecture |
US5559449A (en) * | 1994-02-18 | 1996-09-24 | Sgs-Thomson Microelectronics S.R.L. | Programmable logic array structure for semiconductor nonvolatile memories, particularly flash-eeproms |
US5451912A (en) * | 1994-06-13 | 1995-09-19 | Cypress Semiconductor Corp. | Methods and apparatus for a programmable frequency generator that requires no dedicated programming pins |
US5811987A (en) * | 1995-06-02 | 1998-09-22 | Advanced Micro Devices, Inc. | Block clock and initialization circuit for a complex high density PLD |
US5949987A (en) * | 1995-08-09 | 1999-09-07 | Xilinx, Inc. | Efficient in-system programming structure and method for non-volatile programmable logic devices |
US5719533A (en) * | 1995-09-27 | 1998-02-17 | Matsushita Electric Industrial Col., Ltd. | Function generator |
US5877656A (en) * | 1995-10-30 | 1999-03-02 | Cypress Semiconductor Corp. | Programmable clock generator |
US6433645B1 (en) * | 1995-10-30 | 2002-08-13 | Cypress Semiconductor Corp. | Programmable clock generator |
US5684434A (en) * | 1995-10-30 | 1997-11-04 | Cypress Semiconductor | Erasable and programmable single chip clock generator |
US5687325A (en) * | 1996-04-19 | 1997-11-11 | Chang; Web | Application specific field programmable gate array |
US6272646B1 (en) * | 1996-09-04 | 2001-08-07 | Cypress Semiconductor Corp. | Programmable logic device having an integrated phase lock loop |
US6408432B1 (en) * | 1996-11-14 | 2002-06-18 | Altera Corporation | Apparatus and method for in-system programming of integrated circuits containing programmable elements |
US6134707A (en) * | 1996-11-14 | 2000-10-17 | Altera Corporation | Apparatus and method for in-system programming of integrated circuits containing programmable elements |
US6490714B1 (en) * | 1996-11-27 | 2002-12-03 | Altera Corporation | Apparatus and method for in-system programming of a field programmable logic device using device-specific characterization data |
US5821776A (en) * | 1997-01-31 | 1998-10-13 | Actel Corporation | Field programmable gate array with mask programmed analog function circuits |
US6150837A (en) * | 1997-02-28 | 2000-11-21 | Actel Corporation | Enhanced field programmable gate array |
US6034541A (en) * | 1997-04-07 | 2000-03-07 | Lattice Semiconductor Corporation | In-system programmable interconnect circuit |
US5999014A (en) * | 1997-09-17 | 1999-12-07 | Xilinx, Inc. | Method for concurrently programming or accessing a plurality of in-system-programmable logic devices |
US6389321B2 (en) * | 1997-11-04 | 2002-05-14 | Lattice Semiconductor Corporation | Simultaneous wired and wireless remote in-system programming of multiple remote systems |
US6091641A (en) * | 1997-11-18 | 2000-07-18 | Stmicroelectronics S.A. | Non-volatile memory device and method for the programming of the same |
US6104257A (en) * | 1997-12-22 | 2000-08-15 | Cypress Semiconductor Corp. | Crystal oscillator with eprom-controlled frequency trim |
US6356161B1 (en) * | 1998-03-19 | 2002-03-12 | Microchip Technology Inc. | Calibration techniques for a precision relaxation oscillator integrated circuit with temperature compensation |
US6415344B1 (en) * | 1998-04-29 | 2002-07-02 | Stmicroelectronics Limited | System and method for on-chip communication |
US6145020A (en) * | 1998-05-14 | 2000-11-07 | Advanced Technology Materials, Inc. | Microcontroller incorporating an enhanced peripheral controller for automatic updating the configuration date of multiple peripherals by using a ferroelectric memory array |
US6356107B1 (en) * | 1998-05-21 | 2002-03-12 | Lattice Semiconductor Corporation | Method and structure dynamic in-system programming |
US6304099B1 (en) * | 1998-05-21 | 2001-10-16 | Lattice Semiconductor Corporation | Method and structure for dynamic in-system programming |
US6243842B1 (en) * | 1998-06-08 | 2001-06-05 | Stmicroelectronics, Inc. | Method and apparatus for operating on a memory unit via a JTAG port |
US5889701A (en) * | 1998-06-18 | 1999-03-30 | Xilinx, Inc. | Method and apparatus for selecting optimum levels for in-system programmable charge pumps |
US6346905B1 (en) * | 1998-11-27 | 2002-02-12 | Stmicroelectronics S.R.L. | Analog-to-digital flash converter for generating a thermometric digital code |
US20020007467A1 (en) * | 1998-12-30 | 2002-01-17 | Ma Edward Tang Kwai | Microcontroller with a user configurable pulse width modulator |
US6260087B1 (en) * | 1999-03-03 | 2001-07-10 | Web Chang | Embedded configurable logic ASIC |
US6753739B1 (en) * | 1999-03-24 | 2004-06-22 | Cypress Semiconductor Corp. | Programmable oscillator scheme |
US6515551B1 (en) * | 1999-03-24 | 2003-02-04 | Cypress Semiconductor Corp. | Programmable oscillator scheme |
US6191660B1 (en) * | 1999-03-24 | 2001-02-20 | Cypress Semiconductor Corp. | Programmable oscillator scheme |
US6442068B1 (en) * | 1999-07-30 | 2002-08-27 | Stmicroelectronics S.R.L. | Non-volatile memory with functional capability of burst mode read and page mode read during suspension of an operation of electrical alteration |
US6334208B1 (en) * | 1999-08-11 | 2001-12-25 | Xilinx, Inc. | Method and apparatus for in-system programming with a status bit |
US20010030554A1 (en) * | 2000-02-14 | 2001-10-18 | Stmicroelectronics S.R.L. | Programmable logic arrays |
US6396168B2 (en) * | 2000-02-14 | 2002-05-28 | Stmicroelectronics S.R.L. | Programmable logic arrays |
US6651199B1 (en) * | 2000-06-22 | 2003-11-18 | Xilinx, Inc. | In-system programmable flash memory device with trigger circuit for generating limited duration program instruction |
US6526557B1 (en) * | 2000-07-25 | 2003-02-25 | Xilinx, Inc. | Architecture and method for partially reconfiguring an FPGA |
US6594192B1 (en) * | 2000-08-31 | 2003-07-15 | Stmicroelectronics, Inc. | Integrated volatile and non-volatile memory |
US6614320B1 (en) * | 2000-10-26 | 2003-09-02 | Cypress Semiconductor Corporation | System and method of providing a programmable clock architecture for an advanced microcontroller |
US20020108006A1 (en) * | 2000-10-26 | 2002-08-08 | Warren Snyder | Microcontroller programmable system on a chip |
US6483344B2 (en) * | 2001-01-31 | 2002-11-19 | Stmicroelectronics, Inc. | Interconnect circuitry for implementing logic functions in a field programmable gate array and method of operation |
US6748577B2 (en) * | 2001-06-29 | 2004-06-08 | Stmicroelectronics Ltd. | System for simplifying the programmable memory to logic interface in FPGA |
US20030001614A1 (en) * | 2001-06-29 | 2003-01-02 | Stmicroelectronics Pvt. Ltd. | Field programmable logic device with efficient memory utilization |
US20030005402A1 (en) * | 2001-06-29 | 2003-01-02 | Stmicroelectronics Ltd. | System for simplifying the programmable memory to logic interface in FPGA |
US6552935B2 (en) * | 2001-08-02 | 2003-04-22 | Stmicroelectronics, Inc. | Dual bank flash memory device and method |
US20030074637A1 (en) * | 2001-10-16 | 2003-04-17 | Marco Pavesi | Clock generation system for a prototyping apparatus |
US20030210585A1 (en) * | 2002-03-14 | 2003-11-13 | Stmicroelectronics S.R.I. | Non-volatile memory device |
US20030214321A1 (en) * | 2002-04-05 | 2003-11-20 | Stmicroelectronics Pvt. Ltd. | Architecture for programmable logic device |
US20030213599A1 (en) * | 2002-05-20 | 2003-11-20 | Tinker Donald W. | Whipstock collet latch |
US20040008055A1 (en) * | 2002-05-29 | 2004-01-15 | Stmicroelectronics Pvt. Ltd. | Programmable logic devices providing reduced power consumption |
US6600355B1 (en) * | 2002-06-10 | 2003-07-29 | Xilinx, Inc. | Clock generator circuit providing an output clock signal from phased input clock signals |
US20040036500A1 (en) * | 2002-08-08 | 2004-02-26 | Bratt Adrian Harvey | Semiconductor devices |
US6674332B1 (en) * | 2002-09-06 | 2004-01-06 | Cypress Semiconductor, Corp. | Robust clock circuit architecture |
US6924709B2 (en) * | 2003-10-10 | 2005-08-02 | Standard Microsystems Corporation | Integrated relaxation oscillator with improved sensitivity to component variation due to process-shift |
US7116181B2 (en) * | 2004-12-21 | 2006-10-03 | Actel Corporation | Voltage- and temperature-compensated RC oscillator circuit |
US7439818B2 (en) * | 2004-12-21 | 2008-10-21 | Actel Corporation | Voltage-and temperature-compensated RC oscillator circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9024693B2 (en) | 2013-06-06 | 2015-05-05 | Industrial Technology Research Institute | Crystal-less clock generator and operation method thereof |
US9685238B2 (en) | 2015-07-09 | 2017-06-20 | Samsung Electronics Co., Ltd. | Clock signal generation device and memory device including the same |
Also Published As
Publication number | Publication date |
---|---|
WO2006068942A3 (en) | 2006-09-14 |
US20060284666A1 (en) | 2006-12-21 |
US7116181B2 (en) | 2006-10-03 |
US7439818B2 (en) | 2008-10-21 |
EP1829201A2 (en) | 2007-09-05 |
WO2006068942A2 (en) | 2006-06-29 |
WO2006068942A9 (en) | 2006-08-03 |
JP2008524962A (en) | 2008-07-10 |
US20060132250A1 (en) | 2006-06-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7439818B2 (en) | Voltage-and temperature-compensated RC oscillator circuit | |
EP1056207B1 (en) | Voltage-controlled ring oscillator with differential amplifiers | |
US7495507B2 (en) | Circuits for generating reference current and bias voltages, and bias circuit using the same | |
US6057727A (en) | Accurate constant current generator | |
JP2003015750A (en) | Dynamic input stage bias for low quiescent current amplifier | |
KR101070031B1 (en) | Circuit for generating reference current | |
US5672993A (en) | CMOS current mirror | |
US7633346B2 (en) | Transconductance compensating bias circuit and amplifier | |
KR19990008217A (en) | Low voltage differential amplifier | |
KR101080560B1 (en) | Transconductance adjusting circuit | |
US7109785B2 (en) | Current source for generating a constant reference current | |
US20020079968A1 (en) | Common mode output current control circuit and method | |
US6720836B2 (en) | CMOS relaxation oscillator circuit with improved speed and reduced process/temperature variations | |
EP0895354B1 (en) | Voltage-controlled oscillator | |
US20080001592A1 (en) | Method for generating a reference current and a related feedback generator | |
US7847645B2 (en) | Oscillation control apparatus and oscillator | |
US20030132806A1 (en) | Voltage controlled oscillator with reference current generator | |
US10498231B2 (en) | Charge pump circuitry | |
KR100476559B1 (en) | Sine buffer circuit of temperature compensated crystal oscillator | |
JP3357792B2 (en) | Voltage-current conversion circuit and PLL circuit including the same | |
JPH06152272A (en) | Constant current circuit | |
JP2903213B2 (en) | Level conversion circuit | |
JP2000031756A (en) | Current mirror circuit and charge pump circuit | |
EP0905989A1 (en) | Installing apparatus into subscriber lines | |
JP2000148269A (en) | Intermediate reference potential generator |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |