WO1991011725A1

WO1991011725A1 - Instantaneous multiplier for use in power measurement systems

Info

Publication number: WO1991011725A1
Application number: PCT/GB1990/000134
Authority: WO
Inventors: Andrew John Wilks
Original assignee: Omega Electric Limited
Priority date: 1988-07-26
Filing date: 1990-01-30
Publication date: 1991-08-08
Also published as: GB2221313B; GB2221313A; GB8817714D0

Abstract

The instantaneous AC voltage v is applied to a full-wave rectifier (10) and a phase detector (11). The output of the full-wave rectifier is applied to an analogue to digital convertor (1) and the output of this is in turn applied to a digitally programmable binary resistor network (12) such as an R-2R network. A voltage signal representative of the instantaneous AC current i is applied to the digitally programmable binary resistor network (12). Hence the output of the amplifier (13) will be the resultant of instantaneous current multiplied by the rectified value of the applied voltage by virtue of the input resistance to the amplifier (13) being made to vary with the rectified value of the applied voltage. The phase of the applied voltage is determined by a phase detector (11) which operates an analogue changeover switch (14) so that the output of the amplifier (13) is inverted by an amplifier (15) for negative excursions of the instantaneous voltage v. Hence the output of a summing amplifier (16) will be a true representation of instantaneous power.

Description

Instantaneous Multiplier for use in Power Measurement Systems

This invention relates to an instantaneous multiplier for use in power measurement systems such as solid state electricity meters. Solid state electricity meters generally require a four quadrant multiplier to compute the actual power waveform with varying voltage, current and power factor of the load. This is generally achieved using a four quadrant multiplier based upon the variable transconductance principle. Unfortunately such four quadrant multipliers suffer from drift problems and linearity errors.

Alternatively digital sampling techniques can be employed, but these suffer from phase errors due to the inherent delays associated with the techniques. Optical multipliers to date suffer from inherent slow response times, which render them useless for instantaneous calculation as is required in dynamic power measurement.

According to the present invention there is provided an instantaneous multiplier for electrical power meters incorporating a variable resistance network within an amplifier circuit, said variable resistance network being designed to vary with the magnitude of the rectified voltage on an instantaneous basis, an input to the resistance network for receipt of a signal representative of the instantaneous AC current and a phase comparator controlling a changeover switch at the amplified output of the resistance network to correct for loss of phase information in the voltage due to rectification.

Ideally the multiplier will use an analogue to digital convertor connected to the input of a digitally programmable resistor network as the resistance network to vary the resistance within the amplifier circuit. In this case the analogue to digital convertor will preferably incorporate a further digitally programmable resistance network whose output is compared continuously with the rectified voltage level and is modified to track that voltage.

The invention may be performed in various ways and preferred examples will now be described with reference to the accompanying drawings, in which:- Figure 1 shows details of the construction of an analogue to digital convertor forming part of the circuit of an instantaneous multiplier of this invention;

Figure 2 is a block diagram of the full instantaneous multiplier circuit; and Figure 3 is a similar block diagram of an alternative form of multiplier circuit.

Referring to Figure 1, illustrating the analogue to digital convertor, a full wave rectified voltage waveform is applied to a non-inverting input of a comparator 2. If the rectified signal input is lower than the other input then the comparator output will be a '0' and the output of a de¬ glitching clocked latch 3 will be a 'O¹ also. This causes

SUBSTITUTE SHEET an 8-bit up/down counter 4 (fed by an oscillator 8) to count up, which causes extra current to flow into the summing junction of an operational amplifier 5 from a digitally programmable 8-bit R-2R network 6 and a voltage reference 7. The inverting operational amplifier 5 then produces an output which is applied to the inverting input of the comparator 2. This sequence of events will continue until the voltage at the inverting input of the comparator 2 is more negative than at the non-inverting input, causing the comparator 2 to change state at its output, which is propagated through the latch 3, causing the counter 4 to count down. The current flowing into the summing junction of the operational amplifier 5 will thus decrease causing the voltage at the inverting input of the comparator 2 to fall, which may produce a change of state of the comparator 2.

Hence it can be seen that the overall action is that the voltage at the inverting input of the comparator 2 will closely track the voltage at the non-inverting input. The oscillator 8 always produces a count up or count down in the counter 4, and an invertor 9 ensures that the count up or down occurs at a defined time after the previous count, to overcome oscillation at the output of the comparator 2 due to the two inputs being at similar potentials. The oscillator rate is generally faster than that required as a miniumum to track the full-wave rectified waveform so that the re-constituted waveform at the inverting input of the

SUBSTITUTE SHEET comparator 2 'hunts' about the waveform on the non-inverting input, effectively increasing the resolution of the 8-bit convertor of the voltage envelope.

Referring to Figure 2, the instantaneous AC voltage v is applied to a full-wave rectifier 10 and a phase detector 11. The output of the full-wave rectifier is applied to the analogue to digital convertor 1 and the output of this is in turn applied to a digitally programmable binary resistor network 12 such as an R-2R network. Alternatively, to achieve the same effect, the digitally programmable resistor network 17 of Figure 3 could be used. This comprises a number of analogue switches 18 and a weighted resistor network 19.

A voltage signal representative of the instantaneous AC current i is applied to the digitally programmable binary resistor network 12. Hence the output of the amplifier 13 will be the resultant of instantaneous current multiplied by the rectified value of the applied voltage by virtue of the input resistance to the amplifier 13 being made to vary with the rectified value of the applied voltage.

In order to calculate correctly the active power supplied to a load the phase of the applied voltage is determined by a phase detector 11. This detection of the sign of the applied voltage effectively is a doubling in resolution of the A to D convertor section 1 of the scheme. The phase detector 11 then operates an analogue changeover switch 14 so that the output of the amplifier 13 is inverted

SUBSTITUTE SHEET by an amplifier 15 for negative excursions of the instantaneous voltage v. Hence the output of a summing amplifier 16 will be a true representation of instantaneous power.

SUBSTITUTE SHEET

Claims

1. An instantaneous multiplier for electrical power meters incorporating a variable resistance network within an amplifier circuit, said variable resistance network being designed to vary with the magnitude of the rectified voltage on an instantaneous basis, an input to the resistance network for receipt of a signal representative of the instantaneous AC current, and a phase comparator controlling a changeover switch at the amplified output of the resistance network to correct for loss of phase information in the voltage due to rectification.

2. A multiplier as claimed in Claim 1 using an analogue to digital convertor connected to the input of a digitally programmable resistor network as the resistance network to vary the resistance within the amplifier circuit.

3. A multiplier as claimed in Claim 2, wherein the analogue to digital convertor incorporates a further digitally programmable resistance network whose output is compared continuously with the rectified voltage level and is modified to track that voltage.

4. An instantaneous multiplier substantially as herein described with reference to the accompanying drawings.

SUBSTITUTESHEET